The present disclosure relates to electrical machines. The teachings thereof may be embodied in a corona shielding system, especially for an electrical machine, e.g., a high-voltage machine, such as a generator for generation of electrical energy, an electric motor, or another piece of electrical equipment having a relatively high rated voltage, e.g., a transformer or a bushing or a cable. A corona shielding system may include: a polymeric matrix; and filler particles comprising mica surrounded by a layer of at least one ceramic metal oxide. The filler particles may be distributed throughout the polymeric matrix.

This insulated wire includes an insulating coating formed on a surface of a conductive wire body, and a soldered portion for electric conduction. The soldered portion is formed by attaching dicarboxylic acid onto a surface of the insulating coating, and by performing solder plating in a state where the dicarboxylic acid is attached onto the surface of the insulating coating. In addition, this method for manufacturing an insulated wire includes a surface treatment step of attaching the dicarboxylic acid onto a surface of an insulating coating which becomes the soldered portion, and a soldering step of performing the solder plating by immersing the surface treated portion of the insulating coating in a heated solder melt.

This insulated wire includes an insulating coating formed on a surface of a conductive wire body, and a soldered portion for electric conduction. The soldered portion is formed by attaching dicarboxylic acid onto a surface of the insulating coating, and by performing solder plating in a state where the dicarboxylic acid is attached onto the surface of the insulating coating. In addition, this method for manufacturing an insulated wire includes a surface treatment step of attaching the dicarboxylic acid onto a surface of an insulating coating which becomes the soldered portion, and a soldering step of performing the solder plating by immersing the surface treated portion of the insulating coating in a heated solder melt.

A dielectric composition containing a complex oxide represented by the formula of xAO-yBO-zC.sub.2O.sub.5 as the main component, wherein A represents at least one element selected from the group including Ba, Ca and Sr, B represents Mg, and C represents at least one element selected from the group including Nb and Ta, and x, y and z meet the following conditions, x+y+z=1.000, 0.198≦x≦0.375, 0.389≦y≦0.625, and x/3≦z≦x/3+1/9.

A dielectric composition containing a complex oxide represented by the formula of xAO-yBO-zC.sub.2O.sub.5 as the main component, wherein A represents at least one element selected from the group including Ba, Ca and Sr, B represents Mg, and C represents at least one element selected from the group including Nb and Ta, and x, y and z meet the following conditions, x+y+z=1.000, 0.198≦x≦0.375, 0.389≦y≦0.625, and x/3≦z≦x/3+1/9.

A dielectric composition containing a complex oxide represented by the formula of xAO-yBO-zC.sub.2O.sub.5 as the main component, wherein A represents at least one element selected from the group including Ba, Ca and Sr, B represents Mg, and C represents at least one element selected from the group including Nb and Ta, and x, y and z meet the following conditions, x+y+z=1.000, 0.000<x≦0.281, 0.625≦y<1.000, and 0.000<z≦0.375.

A dielectric composition containing a complex oxide represented by the formula of xAO-yBO-zC.sub.2O.sub.5 as the main component, wherein A represents at least one element selected from the group including Ba, Ca and Sr, B represents Mg, and C represents at least one element selected from the group including Nb and Ta, and x, y and z meet the following conditions, x+y+z=1.000, 0.000<x≦0.281, 0.625≦y<1.000, and 0.000<z≦0.375.

Artificial synaptic devices with an HfO.sub.2-based ferroelectric layer that can be implemented in the CMOS back-end are provided. In one aspect, an artificial synapse element is provided. The artificial synapse element includes: a bottom electrode; a ferroelectric layer disposed on the bottom electrode, wherein the ferroelectric layer includes an HfO.sub.2-based material that crystallizes in a ferroelectric phase at a temperature of less than or equal to about 400° C.; and a top electrode disposed on the bottom electrode. An artificial synaptic device including the present artificial synapse element and methods for formation thereof are also provided.

Artificial synaptic devices with an HfO.sub.2-based ferroelectric layer that can be implemented in the CMOS back-end are provided. In one aspect, an artificial synapse element is provided. The artificial synapse element includes: a bottom electrode; a ferroelectric layer disposed on the bottom electrode, wherein the ferroelectric layer includes an HfO.sub.2-based material that crystallizes in a ferroelectric phase at a temperature of less than or equal to about 400° C.; and a top electrode disposed on the bottom electrode. An artificial synaptic device including the present artificial synapse element and methods for formation thereof are also provided.

A photonic integrated circuit is presented that includes a substrate, and a first and second waveguide patterned on the substrate. The first waveguide guides an input beam of radiation. The photonic integrated circuit also includes a coupling region, wherein the first and second waveguides each pass through the coupling region. One or more modulating elements are coupled to each of the first and second waveguides. The first waveguide and the second waveguide have a first facet and a second facet, respectively, and first and second reflections are generated at the first and second facets within the first and second waveguides, respectively. The one or more modulating elements coupled to each of the first and second waveguides are designed to adjust the phase of the first and second reflections before the first and second reflections pass through the coupling region.