A chip resistor with a reduced thickness is provided. The chip resistor includes an insulating substrate, a resistor embedded in the substrate, a first electrode electrically connected to the resistor, and a second electrode electrically connected to the resistor. The first electrode and the second electrode are spaced apart from each other in a lateral direction that is perpendicular to the thickness direction of the substrate.

A chip resistor with a reduced thickness is provided. The chip resistor includes an insulating substrate, a resistor embedded in the substrate, a first electrode electrically connected to the resistor, and a second electrode electrically connected to the resistor. The first electrode and the second electrode are spaced apart from each other in a lateral direction that is perpendicular to the thickness direction of the substrate.

Particularly, it is an object to provide a circuit substrate that can reduce a field intensity near an electrode having a high potential. A circuit substrate of the present invention includes an insulated substrate, a thin-film resistive element, and electrodes electrically connected to both sides of the thin-film resistive element, the thin-film resistive element and the electrodes being disposed on a surface of the insulated substrate. The circuit substrate is characterized in that the thin-film resistive element has a pattern in which a resistance wire is repeatedly folded back, and a dummy wire for reducing a field intensity is provided on a high-potential electrode side.

An integrated circuit includes; a substrate including a single active region, a first active resistor formed on the substrate, and a transistor including a first junction area in the single active region. The first active resistor and the transistor are electrically connected through the first junction area. The first active resistor is formed between a first node and a second node included in the first junction area. The first node is connected to a first contact, and the second node is connected to a second contact.

An integrated circuit includes; a substrate including a single active region, a first active resistor formed on the substrate, and a transistor including a first junction area in the single active region. The first active resistor and the transistor are electrically connected through the first junction area. The first active resistor is formed between a first node and a second node included in the first junction area. The first node is connected to a first contact, and the second node is connected to a second contact.

The invention relates to a shunt resistor (2) for detecting the status of an electrical energy storage unit (1), wherein the shunt resistor (2) comprises a first layer (4), a second layer (6) and a third layer (8). According to the invention, the layers (4, 6, 8) are arranged in a layered manner in a stacking direction (V), wherein the second layer (6) is arranged between the first layer (4) and the third layer (8), and wherein the layers (4, 6, 8) are in physical contact with one another at one of the sides having the greatest respective surface area, and wherein the layers (4, 6, 8) are arranged at least partially overlapping.

The invention relates to a shunt resistor (2) for detecting the status of an electrical energy storage unit (1), wherein the shunt resistor (2) comprises a first layer (4), a second layer (6) and a third layer (8). According to the invention, the layers (4, 6, 8) are arranged in a layered manner in a stacking direction (V), wherein the second layer (6) is arranged between the first layer (4) and the third layer (8), and wherein the layers (4, 6, 8) are in physical contact with one another at one of the sides having the greatest respective surface area, and wherein the layers (4, 6, 8) are arranged at least partially overlapping.

In an embodiment a sensor element includes a carrier having an electrically insulating material, a top side and a bottom side, an NTC thermistor arranged on the top side of the carrier and at least two first electrodes configured for electrically contacting the sensor element, wherein the first electrodes are arranged on the top side of the carrier, wherein the sensor element is configured to measure a temperature, and wherein the sensor element is configured for direct integration in an electrically insulating manner.

A resistor includes a first insulator, a resistive body, a second insulator, a pair of electrodes, and a covering body. The first insulator has a first obverse surface facing in a thickness direction thereof. The resistive body is provided on the first obverse surface. The second insulator covers the resistive body. The pair of electrodes are electrically connected to the resistive body at both sides in a first direction perpendicular to the thickness direction. The covering body is formed on at least one of the first insulator and the second insulator. The covering body has electrical conductivity. The first layer is in contact with at least one of the first insulator and the second insulator.

A shunt resistor module which is coupled to a printed circuit board to be used for current measurement, includes: a resistor portion configured to have predetermined resistance; at least two terminal portions configured to extend from opposite ends of the resistor portion; lead pins fixed to first sides of the terminal portions to protrude to be electrically connected to the printed circuit board; and an exterior member formed to at least partially cover first surfaces of the terminal portions and to have pin holes opened to expose the lead pins and screw holes formed to be screwed to the printed circuit board.