A multilayer varistor includes: a sintered compact; an internal electrode provided inside the sintered compact; a high-resistivity layer arranged to cover the sintered compact at least partially and containing element Si; and an external electrode arranged to cover the high-resistivity layer partially, electrically connected to the internal electrode, and containing silver as a main component thereof. A ratio of a total mass of the alkali metals and the alkaline earth metals to a mass of the element Si in a surface region of the high-resistivity layer is equal to or less than 0.6.

A multilayer varistor of the present disclosure includes a sintered body, a first internal electrode, a second internal electrode, a first external electrode, a second external electrode, and a high-resistance layer. The first internal electrode and the second internal electrode are disposed in the sintered body. The first external electrode is disposed on a surface of the sintered body and is electrically connected to the first internal electrode. The second external electrode is disposed on the surface of the sintered body and is electrically connected to the second internal electrode. The high-resistance layer covers at least part of the surface of the sintered body, and the high-resistance layer has a surface having a plurality of cracks.

A chip varistor includes an element body exhibiting varistor characteristics, internal electrodes containing a first electrically conductive material, and an intermediate conductor containing a second electrically conductive material. The intermediate conductor is separated from the internal electrodes in a direction in which the internal electrodes oppose each other, and is disposed between the internal electrodes. At least a part of the intermediate conductor overlaps the internal electrodes in the direction in which the internal electrodes oppose each other. The element body includes a low resistance region in which the second electrically conductive material is diffused. The low resistance region is located between the first and second internal electrodes in the direction in which the first and second internal electrodes oppose each other.

A chip varistor includes an element body exhibiting varistor characteristics, internal electrodes containing a first electrically conductive material, and an intermediate conductor containing a second electrically conductive material. The intermediate conductor is separated from the internal electrodes in a direction in which the internal electrodes oppose each other, and is disposed between the internal electrodes. At least a part of the intermediate conductor overlaps the internal electrodes in the direction in which the internal electrodes oppose each other. The element body includes a low resistance region in which the second electrically conductive material is diffused. The low resistance region is located between the first and second internal electrodes in the direction in which the first and second internal electrodes oppose each other.

A composite circuit protection device includes: a first positive temperature coefficient (PTC) component; a first voltage-dependent resistor (VDR); a second VDR; and a plurality of conductive leads that correspondingly connect to the first PTC component, the first VDR and the second VDR. The second VDR and the first PTC component are electrically connected in series, the first VDR is electrically connected to the series connection of the first PTC component and the second VDR in parallel, and the first VDR has a varistor voltage greater than that of the second VDR as determined at 1 mA.

Devices and methods related to metal oxide varistor (MOV) having modified edge. In some embodiments, a MOV can include a metal oxide layer having first side and second sides, first and second electrodes implemented on the first and second sides of the metal oxide layer, respectively, with each electrode including a laterally inner portion and an edge portion. The edge portion of at least the first electrode can have a flared profile. In some embodiments, two of such MOVs can be joined to provide a sealed chamber defined by shapes of the first sides of the respective metal oxide layers and enclosing a gas therein, such that the sealed chamber with the gas and the first electrodes of the two MOVs form a gas discharge tube (GDT).

Devices and methods related to metal oxide varistor (MOV) having modified edge. In some embodiments, a MOV can include a metal oxide layer having first side and second sides, first and second electrodes implemented on the first and second sides of the metal oxide layer, respectively, with each electrode including a laterally inner portion and an edge portion. The edge portion of at least the first electrode can have a flared profile. In some embodiments, two of such MOVs can be joined to provide a sealed chamber defined by shapes of the first sides of the respective metal oxide layers and enclosing a gas therein, such that the sealed chamber with the gas and the first electrodes of the two MOVs form a gas discharge tube (GDT).

A thermally protected metal oxide varistor includes a body, a first electrode, a thermal fuse, and a glue. The body is made up of a crystalline microstructure including zinc oxide mixed with one or more other metal oxides. The first electrode is located on one side of the body and is connected to a first lead wire. The thermal fuse is connected between the first electrode and the first lead wire. The glue is to be deposited over the thermal fuse as well as over a top portion of the first lead wire.

A thermally protected metal oxide varistor includes a body, a first electrode, a thermal fuse, and a glue. The body is made up of a crystalline microstructure including zinc oxide mixed with one or more other metal oxides. The first electrode is located on one side of the body and is connected to a first lead wire. The thermal fuse is connected between the first electrode and the first lead wire. The glue is to be deposited over the thermal fuse as well as over a top portion of the first lead wire.

Disclosed in the present invention is a novel overvoltage protective device for lightning protection, comprising a first varistor, a second varistor, a PTC Thermistor, and lead-out terminals. The first varistor and the PTC Thermistor are connected in parallel, and then further connected in series with the second varistor to form a single port combined circuit. The surge-withstand capability of the first varistor is higher than the surge-withstand capability of the second varistor. At least one of the two lead-out terminals of the single port combined circuit is a thermally-conductive end with low thermal resistance. The second varistor is thermally coupled to the PTC Thermistor. The thermally-conductive end with low thermal resistance is thermally coupled to one or both of the second varistor and the PTC Thermistor.