An electronic component includes a glass substrate, an outer surface conductor that is in contact with an outer surface of the glass substrate, and a protective film that covers the outer surface of the glass substrate and the outer surface conductor and is in contact with the outer surface of the glass substrate and the outer surface conductor. When the glass substrate has first surface roughness Ra1 at an interface between the glass substrate and the outer surface conductor, the glass substrate has second surface roughness Ra2 at an interface between the glass substrate and the protective film, and the outer surface conductor has third surface roughness Ra3 at an interface between the outer surface conductor and the protective film, Ra1<Ra3<Ra2 is satisfied.

A multilayer substrate includes an element assembly including insulating layers stacked along a layer stacking axis including a first direction and a second direction, and a coil disposed at the element assembly. The coil includes a spiral of two or more turns when viewed from the layer stacking axis and extending along the layer the first direction while spiraling from outside inward. A portion of the coil defining an outermost turn of the spiral is defined as a first coil portion, an inner portion of the coil that is the n.sup.th nearest from the first coil portion is defined as an n+1.sup.th coil portion, and a space between the n.sup.th coil portion and the n+1.sup.th coil portion is defined as an n.sup.th space, where n is a natural number.

A coil component includes a support member, an internal coil supported by the support member and including a plurality of coil patterns, and external electrodes connected to the internal coil and including a first layer in contact with the internal coil and a second layer disposed on the first layer. The second layer is a composite layer including a conductive material and a resin. The support member includes first and second surfaces facing the external electrodes, respectively, and one or more of at least a portion of the first surface and at least a portion of the second surface are configured as cut surfaces.

An asymmetric spiral inductor fabricated in a semiconductor structure includes a spiral coil, a metal segment, and a connection structure. The spiral coil is substantially disposed in a first metal layer and includes a first terminal and a second terminal. The first terminal is disposed at an outermost turn of the spiral coil, and the second terminal is disposed at an innermost turn of the spiral coil. The metal segment is disposed in a second metal layer different from the first metal layer and has a third terminal and a fourth terminal. The connection structure connects the second terminal and the third terminal. The first terminal and the fourth terminal form the two terminals of the asymmetric spiral inductor. The spiral coil is a polygon with N sides (N>4). A portion of the metal segment has a shape substantially identical to a portion of the contour of the polygon.

An asymmetric spiral inductor fabricated in a semiconductor structure includes a spiral coil, a metal segment, and a connection structure. The spiral coil is substantially disposed in a first metal layer and includes a first terminal and a second terminal. The first terminal is disposed at an outermost turn of the spiral coil, and the second terminal is disposed at an innermost turn of the spiral coil. The metal segment is disposed in a second metal layer different from the first metal layer and has a third terminal and a fourth terminal. The connection structure connects the second terminal and the third terminal. The first terminal and the fourth terminal form the two terminals of the asymmetric spiral inductor. The spiral coil is a polygon with N sides (N>4). A portion of the metal segment has a shape substantially identical to a portion of the contour of the polygon.

A glass wiring board in which a glass substrate with a small thickness is used as a core substrate to prevent glass breakage during manufacture, and an analog splitter composed of a capacitor and an inductor is formed on the glass substrate so as to stabilize the electrical properties of the analog splitter. An inductor is formed using a through electrode which is in contact with an inorganic adhesive layer on a glass substrate on which the inorganic adhesive layer is formed. A capacitor is formed using an insulating resin opening part formed in an insulating resin layer covering the glass substrate having wiring. The inductor and the capacitor are formed on different layers.

A spiral inductor includes a spiral trace and a plurality of first projections extending along a first edge of the spiral trace. The spiral inductor may further include a plurality of second projections extending along a second edge of the spiral trace, the second edge being opposite the first edge.

A multilayer-type on-chip inductor with a conductive structure includes an insulating redistribution layer disposed on an inter-metal dielectric layer, a first spiral trace layer disposed in the insulating redistribution layer, and a second spiral trace layer disposed in the inter-metal dielectric layer and correspondingly formed below the first spiral trace layer.

The inter-metal dielectric layer has a separating region to divide the second spiral trace layer into line segments. First slit openings each passes through a corresponding line segment, and extends in an extending direction of a length of the corresponding line segment.

An inductor device includes a first wire, a second wire, a third wire, a fourth wire, and an eight-shaped inductor structure. The first wire includes at least two first sub-wires. The second wire includes at least two second sub-wires. The third wire includes at least two third sub-wires. The fourth wire includes at least two fourth sub-wires. The first wire is disposed in a first area. The second wire is disposed in a second area. The third wire is disposed in the first area and at least partially overlapped with the first wire in a vertical direction. The fourth wire is disposed in the second area and at least partially overlapped with the second wire in the vertical direction. The eight-shaped inductor structure is disposed on an outer side of the third wire and the fourth wire.

An inductor structure is provided. A plurality of first and second conductive posts have end surfaces corresponding in profile to ends of first conductive sheets, respectively. As such, the profiles of the end surfaces of the first and second conductive posts are non-cylindrical so as to increase the contact area between the first conductive sheets and the first and second conductive posts, thereby improving the conductive quality and performance of the inductor. Further, since the first and second conductive posts are formed by stacking a plurality of post bodies on one another, the number and cross-sectional area of loops are increased so as to increase the inductance value. A method for fabricating the inductor structure, an electronic package and a fabrication method thereof, and a method for fabricating a packaging carrier are further provided.