A method for fabricating semiconductor device includes the steps of: forming a magnetic tunneling junction (MTJ) on a substrate; forming a liner on the MTJ; removing part of the liner to form a recess exposing the MTJ; and forming a conductive layer in the recess, wherein top surfaces of the conductive layer and the liner are coplanar. Preferably the MTJ further includes: a bottom electrode on the substrate, a fixed layer on the bottom electrode, and a top electrode on the fixed layer, in which the conductive layer and the top electrode are made of same material.

A mother substrate that enables winding cores to be obtained in a manner in which the mother substrate is divided along x-direction division lines and y-direction division lines is prepared. Subsequently, x-direction division grooves are formed along the x-direction division lines on a first main surface of the mother substrate, y-direction division grooves are formed along the y-direction division lines on the first main surface, and shallow bottom surface exposure grooves, for exposing surfaces that are to be core portion bottom surfaces, are formed on the first main surface. The mother substrate is divided by performing a flattening process on a second main surface of the mother substrate that is opposite the first main surface until the second main surface reaches the x-direction division grooves and the y-direction division grooves to obtain the winding cores that are separated from each other.

A mother substrate that enables winding cores to be obtained in a manner in which the mother substrate is divided along x-direction division lines and y-direction division lines is prepared. Subsequently, x-direction division grooves are formed along the x-direction division lines on a first main surface of the mother substrate, y-direction division grooves are formed along the y-direction division lines on the first main surface, and shallow bottom surface exposure grooves, for exposing surfaces that are to be core portion bottom surfaces, are formed on the first main surface. The mother substrate is divided by performing a flattening process on a second main surface of the mother substrate that is opposite the first main surface until the second main surface reaches the x-direction division grooves and the y-direction division grooves to obtain the winding cores that are separated from each other.

A magnetic tunnel junction (MTJ) is disclosed wherein a nitride diffusion barrier (NDB) has a L2/L1/NL or NL/L1/L2 configuration wherein NL is a metal nitride or metal oxynitride layer, L2 blocks oxygen diffusion from an adjoining Hk enhancing layer, and L1 prevents nitrogen diffusion from NL to the free layer (FL) thereby enhancing magnetoresistive ratio and FL thermal stability, and minimizing resistance x area product for the MTJ. NL is the uppermost layer in a bottom spin valve configuration, or is formed on a seed layer in a top spin valve configuration such that L2 and L1 are always between NL and the FL or pinned layer, respectively. In other embodiments, one or both of L1 and L2 are partially oxidized. Moreover, either L2 or L1 may be omitted when the other of L1 and L2 is partially oxidized. A spacer between the FL and L2 is optional.

A magnetic tunnel junction (MTJ) is disclosed wherein a nitride diffusion barrier (NDB) has a L2/L1/NL or NL/L1/L2 configuration wherein NL is a metal nitride or metal oxynitride layer, L2 blocks oxygen diffusion from an adjoining Hk enhancing layer, and L1 prevents nitrogen diffusion from NL to the free layer (FL) thereby enhancing magnetoresistive ratio and FL thermal stability, and minimizing resistance x area product for the MTJ. NL is the uppermost layer in a bottom spin valve configuration, or is formed on a seed layer in a top spin valve configuration such that L2 and L1 are always between NL and the FL or pinned layer, respectively. In other embodiments, one or both of L1 and L2 are partially oxidized. Moreover, either L2 or L1 may be omitted when the other of L1 and L2 is partially oxidized. A spacer between the FL and L2 is optional.

A stack of connecting metal vias is formed on a bottom electrode by repeating steps of depositing a conductive via layer, patterning and trimming the conductive via layer to form a sub 30 nm conductive via, encapsulating the conductive via with a dielectric layer, and exposing a top surface of the conductive via. A MTJ stack is deposited on the encapsulated via stack. A top electrode layer is deposited on the MTJ stack and patterned and trimmed to form a sub 60 nm hard mask. The MTJ stack is etched using the hard mask to form an MTJ device and over etched into the encapsulation layers but not into the bottom electrode wherein metal re-deposition material is formed on sidewalls of the encapsulation layers underlying the MTJ device and not on sidewalls of a barrier layer of the MTJ device.

A stack of connecting metal vias is formed on a bottom electrode by repeating steps of depositing a conductive via layer, patterning and trimming the conductive via layer to form a sub 30 nm conductive via, encapsulating the conductive via with a dielectric layer, and exposing a top surface of the conductive via. A MTJ stack is deposited on the encapsulated via stack. A top electrode layer is deposited on the MTJ stack and patterned and trimmed to form a sub 60 nm hard mask. The MTJ stack is etched using the hard mask to form an MTJ device and over etched into the encapsulation layers but not into the bottom electrode wherein metal re-deposition material is formed on sidewalls of the encapsulation layers underlying the MTJ device and not on sidewalls of a barrier layer of the MTJ device.

A top electrode of a magnetoresistive random access memory (MRAM) device over a magnetic tunnel junction (MTJ) is formed using a film of titanium nitride oriented in a (111) crystal structure rather than a top electrode which uses tantalum, tantalum nitride, and/or a multilayer including tantalum and tantalum nitride.

A top electrode of a magnetoresistive random access memory (MRAM) device over a magnetic tunnel junction (MTJ) is formed using a film of titanium nitride oriented in a (111) crystal structure rather than a top electrode which uses tantalum, tantalum nitride, and/or a multilayer including tantalum and tantalum nitride.

A storage device includes a first conductor that extends in a first direction, a first stacked body that extends in the first direction, is electrically connected to the first conductor, and includes a first ferromagnetic body that extends in the first direction, a second ferromagnetic body, a first insulator between the first stacked body and the second ferromagnetic body, a first switching element having first and second ends, wherein the first end is electrically connected to the second ferromagnetic body, the first switching element regulating current flow between the first and second ends in response to a voltage applied between the first and second ends, a second conductor that extends in a second direction crossing the first direction and is electrically connected to the second end of the first switching element, a third ferromagnetic body, and a second insulator between the third ferromagnetic body and another stacked body.