H01G2/06

HOUSING FOR CHIP FORM ULTRACAPACITOR
20230215665 · 2023-07-06 ·

Disclosed herein is an energy storage apparatus suitable for mounting on a printed circuit board using a solder reflow process, the apparatus comprising a sealed housing body comprising a positive internal contact and a negative internal contact each disposed within the body and each respectively in electrical communication with a positive external contact and a negative external contact, each of the external contacts providing electrical communication to the exterior of the body; an electric double layer capacitor (EDLC) energy storage cell disposed within a cavity in the body comprising a stack of alternating electrode layers and electrically insulating separator layers; an electrolyte disposed within the cavity and wetting the electrode layers; a positive lead electrically connecting a first group of one or more of the electrode layers to the positive internal contact; and a negative lead electrically connecting a second group of one or more of the electrode layers to the negative internal contact; wherein at least one of the positive external contact and the negative external contact is configured with an elongated exterior terminal configured to dissipate thermal shock to the energy storage apparatus.

HOUSING FOR CHIP FORM ULTRACAPACITOR
20230215665 · 2023-07-06 ·

Disclosed herein is an energy storage apparatus suitable for mounting on a printed circuit board using a solder reflow process, the apparatus comprising a sealed housing body comprising a positive internal contact and a negative internal contact each disposed within the body and each respectively in electrical communication with a positive external contact and a negative external contact, each of the external contacts providing electrical communication to the exterior of the body; an electric double layer capacitor (EDLC) energy storage cell disposed within a cavity in the body comprising a stack of alternating electrode layers and electrically insulating separator layers; an electrolyte disposed within the cavity and wetting the electrode layers; a positive lead electrically connecting a first group of one or more of the electrode layers to the positive internal contact; and a negative lead electrically connecting a second group of one or more of the electrode layers to the negative internal contact; wherein at least one of the positive external contact and the negative external contact is configured with an elongated exterior terminal configured to dissipate thermal shock to the energy storage apparatus.

MUTILAYER ELECTRONIC COMPONENT

A multilayer electronic component includes a body and first and second surfaces opposing each other in a first direction, third and fourth surfaces connected to the first and second surfaces and opposing each other in a second direction; a first external electrode including a first connection portion disposed on the third surface, and a first band portion extending from the first connection portion to a portion of the first surface; a second external electrode including a second connection portion disposed on the fourth surface, and a second band portion extending from the second connection portion to a portion of the first surface; an insulating layer disposed on the second surface and extending to the first and second connection portions; a first plating layer disposed on the first band portion; and a second plating layer disposed on the second band portion, wherein the insulating layer includes an oxide including silicon (Si).

MULTILAYER ELECTRONIC COMPONENT

A multilayer electronic component includes a body including a dielectric layer and a first internal electrode and a second internal electrode having first to sixth surfaces, a first external electrode including a first connection portion on the third surface, a first band portion on a portion of the first surface, and a third band portion on a portion of the second surface, a second external electrode including a second connection portion on the fourth surface, a second band portion on a portion of the first surface, and a fourth band portion on a portion of the second surface, an insulating layer disposed on the first and second connection portions and covering the second surface and the third and fourth band portions, a first plating layer disposed on the first band portion, and a second plating layer disposed on the second band portion. The insulating layer includes an oxide containing Ba.

MULTILAYER ELECTRONIC COMPONENT

An electronic component includes: a body including a dielectric layer and internal electrodes, and including first to sixth surfaces; a first external electrode including a connection portion on the third surface, and first and third band portions respectively on the first and second surfaces; a second external electrode including a connection portion on the fourth surface, and second and fourth band portions respectively on the first and second surfaces; an insulating layer disposed on the connection portions, and covering the second surface and the third and fourth band portions; plating layers respectively disposed on the first and second band portions; and first and second additional electrode layers respectively disposed between the connection portion and the third surface and between the connection portion and the fourth surface. The first or second external electrode includes copper. The first or second additional electrode layer includes one of nickel and an alloy of nickel.

MULTILAYER ELECTRONIC COMPONENT

A multilayer electronic component includes: a body having first and second surfaces opposing each other in a first direction and third and fourth surfaces connected to the first and second surfaces and opposing each other in a second direction; a first external electrode including a first connection portion, disposed on the third surface, and a first band portion extending from the first connection portion onto a portion of the first surface; a second external electrode including a second connection portion, disposed on the fourth surface, and a second band portion extending from the second connection portion onto a portion of the first surface; an insulating layer disposed on the second surface to extend to portions of the first and second connection portions; a first plating layer disposed on the first band portion; and a second plating layer disposed on the second band portion. The insulating layer includes a polymer resin.

MULTILAYER CAPACITOR

A multilayer capacitor includes: a body including a stack structure in which at least one first internal electrode and at least one second internal electrode are alternately stacked on each other having at least one dielectric layer interposed therebetween in a first direction; first and second external electrodes disposed on the body while being spaced apart from each other to be respectively connected to first internal electrode and second internal electrode; and first and second bumps respectively having one surfaces disposed on the first or second external electrode and including at least one hole positioned in the one surface or the other surface, wherein A.sub.V indicates a total area of the at least one hole, A.sub.B indicates an area of the one surface of the first or second bump, facing the first or second external electrode, and A.sub.V/A.sub.B is greater than 0.012 and less than 0.189.

MULTILAYER CAPACITOR

A multilayer capacitor includes: a body including a stack structure in which at least one first internal electrode and at least one second internal electrode are alternately stacked on each other having at least one dielectric layer interposed therebetween in a first direction; first and second external electrodes disposed on the body while being spaced apart from each other to be respectively connected to first internal electrode and second internal electrode; and first and second bumps respectively having one surfaces disposed on the first or second external electrode and including at least one hole positioned in the one surface or the other surface, wherein A.sub.V indicates a total area of the at least one hole, A.sub.B indicates an area of the one surface of the first or second bump, facing the first or second external electrode, and A.sub.V/A.sub.B is greater than 0.012 and less than 0.189.

Multilayered ceramic capacitor, mounting structure of circuit board having thereon multilayered ceramic capacitor, packing unit for multilayered ceramic capacitor

There is provided a multilayered ceramic capacitor, including: a ceramic body; an active layer including a plurality of first and second internal electrodes; an upper cover layer; a lower cover layer formed below the active layer, the lower cover layer being thicker than the upper cover layer; first and second external electrodes; at least one pair of first and second internal electrodes repeatedly formed inside the lower cover layer, wherein, when A is defined as ½ of an overall thickness of the ceramic body, B is defined as a thickness of the lower cover layer, C is defined as ½ of an overall thickness of the active layer, and D is defined as a thickness of the upper cover layer, a ratio of deviation between a center of the active layer and a center of the ceramic body, (B+C)/A, satisfies 1.063≤(B+C)/A≤1.745.

Multilayer capacitor and board having the same mounted thereon

A multilayer capacitor includes a capacitor body including dielectric layers and first and second internal electrodes, the capacitor body having first to sixth surfaces, the first internal electrode being exposed through the third, fifth, and sixth surfaces, and the second internal electrode being exposed through the fourth, fifth, and sixth surfaces, a first side portion and a second side portion, respectively disposed on the fifth surface and the sixth surface of the capacitor body, and a first external electrode and a second external electrode, respectively be connected to the first internal electrode and the second internal electrode. The first and second side portions comprise an acicular second phase including a glass comprising aluminum (Al) and silicon (Si), manganese (Mn), and phosphorus (P), and a volume of the second phase is 30% or more with respect to the entire first and second side portions.