A chip component includes a chip component main body, an electrode pad formed on a top surface of the main body, a protective film covering the top surface of the main body and having a contact hole exposing the pad, and an external connection electrode electrically connected to the pad via the hole and having a protruding portion, which, in a plan view looking from a direction perpendicular to a top surface of the pad, extends to a top surface of the film and protrudes further outward than a region of contact with the pad over the full periphery of an edge portion of the hole. A method for manufacturing the component includes forming the pad on the main body's top surface, forming the protective film, forming the hole in the film so as to expose the pad, and forming the electrode electrically connected to the pad via the hole.

A supercapacitor, principally ceramic, with a fast recharging rate and extremely high energy density. Energy densities can exceed 9.5 KW-hr/L (0.27 MW-hr/ft.sup.3). High permittivity, high voltage breakdown and nanoporous electrodes achieve these features. High permittivity is reached through a ceramic dielectric consisting of a titanium oxide variant, doped with various combinations of trivalent positive ions. Example: (Al.sub.0.5Nb.sub.0.5).sub.0.5%Ti.sub.99.5%O.sub.2. The dielectric permittivity is further increased by adding layers of conductive island matrices placed in the dielectric. Charge capacity is expanded by use of nanoporous electrodes with an effective area over twenty times a flat surface electrode. Example: graphene. The key process involves sintering wafers, adding conductive island matrices' conductors, typically vacuum impregnating wafers with a polymer, then stacking wafers and electrodes, followed by connecting electrodes. Subassemblies are then stacked into unlimitedly larger macro-assemblies.

An electrical storage module 10 includes: an electrical storage element group 11 in which a plurality of electrical storage elements 12 are stacked on one another, each electrical storage element having lead terminals 13 that protrude from a side edge of the electrical storage element; and fuses 45 that are electrically connected to the lead terminals 13. Detection terminals 50 for detecting a state of the electrical storage elements 12 are directly connected to the fuses 45.

An electrical storage module 10 includes: an electrical storage element group 11 in which a plurality of electrical storage elements 12 are stacked on one another, each electrical storage element having lead terminals 13 that protrude from a side edge of the electrical storage element; and fuses 45 that are electrically connected to the lead terminals 13. Detection terminals 50 for detecting a state of the electrical storage elements 12 are directly connected to the fuses 45.

A multilayer ceramic capacitor may include: a ceramic body; a plurality of first internal electrodes disposed in the ceramic body; a plurality of second internal electrodes stacked alternately with the first internal electrodes in the ceramic body; first and second external electrodes connected to the first internal electrodes, respectively; a third external electrode extended from one side surface of the ceramic body to a portion of a surface opposing a mounting surface of the ceramic body and connected to the second internal electrodes; a fourth external electrode extended from the other side surface of the ceramic body to a portion of the surface opposing the mounting surface of the ceramic body; and an intermitting part disposed on the surface opposing the mounting surface of the ceramic body and connecting the third and fourth external electrodes to each other.

A multilayer ceramic capacitor may include: a ceramic body; a plurality of first internal electrodes disposed in the ceramic body; a plurality of second internal electrodes stacked alternately with the first internal electrodes in the ceramic body; first and second external electrodes connected to the first internal electrodes, respectively; a third external electrode extended from one side surface of the ceramic body to a portion of a surface opposing a mounting surface of the ceramic body and connected to the second internal electrodes; a fourth external electrode extended from the other side surface of the ceramic body to a portion of the surface opposing the mounting surface of the ceramic body; and an intermitting part disposed on the surface opposing the mounting surface of the ceramic body and connecting the third and fourth external electrodes to each other.

A chip component includes a substrate, an element circuit network including a plurality of element parts formed on the substrate, an external connection electrode provided on a surface of the substrate to provide external connection for the element circuit network, a plurality of fuses formed on the substrate and disconnectably connecting each of the plurality of element parts to the external connection electrode, a solder layer formed on an external connection terminal of the external connection electrode and a resin film which covers the surface of the substrate and other surface which intersects the surface of the substrate.

A multilayer ceramic capacitor includes: a ceramic body; first and second internal electrodes disposed so as to be alternately exposed to both end surfaces of the ceramic body with each of dielectric layers; first and second external electrodes formed so as to be extended onto portions of one main surface of the ceramic body, respectively; third and fourth external electrodes formed on both side surfaces of the ceramic body, respectively, so as to be extended onto portions of both main surfaces of the ceramic body, respectively; an intermitting part connecting the third and fourth external electrodes to one another; first and second land patterns formed so as to be connected to the first and third external electrodes, respectively; and a third land pattern formed so as to be connected to both of the second and fourth external electrodes.

A multilayer ceramic capacitor includes: a ceramic body; first and second internal electrodes disposed so as to be alternately exposed to both end surfaces of the ceramic body with each of dielectric layers; first and second external electrodes formed so as to be extended onto portions of one main surface of the ceramic body, respectively; third and fourth external electrodes formed on both side surfaces of the ceramic body, respectively, so as to be extended onto portions of both main surfaces of the ceramic body, respectively; an intermitting part connecting the third and fourth external electrodes to one another; first and second land patterns formed so as to be connected to the first and third external electrodes, respectively; and a third land pattern formed so as to be connected to both of the second and fourth external electrodes.

An electronic device that includes an intermediate connection layer interposed between a wiring substrate with a pair of land electrodes and an electronic component. The intermediate connection layer has first and second connection electrodes formed on the surface of a base. A fuse part is formed inside the second connection electrode between a main conductor part thereof opposed to a first external electrode of the electronic component and a main conductor part of the first connection electrode opposed to a second external electrode of the electronic component.