Nanoscale field-emission devices are presented, wherein the devices include at least a pair of electrodes separated by a gap through which field emission of electrons from one electrode to the other occurs. The gap is dimensioned such that only a low voltage is required to induce field emission. As a result, the emitted electrons energy that is below the ionization potential of the gas or gasses that reside within the gap. In some embodiments, the gap is small enough that the distance between the electrodes is shorter than the mean-free path of electrons in air at atmospheric pressure. As a result, the field-emission devices do not require a vacuum environment for operation.

A photocathode can include a body fabricated of a wide bandgap semiconductor material, a metal layer, and an alkali halide photocathode emitter. The body may have a thickness of less than 100 nm and the alkali halide photocathode may have a thickness less than 10 nm. The photocathode can be illuminated with a dual wavelength scheme.

A photocathode can include a body fabricated of a wide bandgap semiconductor material, a metal layer, and an alkali halide photocathode emitter. The body may have a thickness of less than 100 nm and the alkali halide photocathode may have a thickness less than 10 nm. The photocathode can be illuminated with a dual wavelength scheme.

A two-dimensional (2D) semiconductor with geometry structure and generating method thereof is disclosed herein and the method includes following steps: forming a nano-layer; disposing a 2D material on a substrate; forming a medium layer on the 2D material; transferring the medium layer and the 2D material to the nano-layer; removing the medium layer and leaving the 2D material on a surface of the nano-layer. In accordance with the generating method for 2D semiconductor with geometry structure, a nano microstructure is implemented to enhance and control the 2D materials for field emission and photon emission efficiency.

A two-dimensional (2D) semiconductor with geometry structure and generating method thereof is disclosed herein and the method includes following steps: forming a nano-layer; disposing a 2D material on a substrate; forming a medium layer on the 2D material; transferring the medium layer and the 2D material to the nano-layer; removing the medium layer and leaving the 2D material on a surface of the nano-layer. In accordance with the generating method for 2D semiconductor with geometry structure, a nano microstructure is implemented to enhance and control the 2D materials for field emission and photon emission efficiency.

Electron source designs are disclosed. The emitter structure, which may be silicon, has a layer on it. The layer may be graphene or a photoemissive material, such as an alkali halide. An additional layer between the emitter structure and the layer or a protective layer on the layer can be included. Methods of operation and methods of manufacturing also are disclosed.

Electron source designs are disclosed. The emitter structure, which may be silicon, has a layer on it. The layer may be graphene or a photoemissive material, such as an alkali halide. An additional layer between the emitter structure and the layer or a protective layer on the layer can be included. Methods of operation and methods of manufacturing also are disclosed.

A method is presented for controlling an electric field from a gate structure. The method includes forming a hardmask over a fin stack including a plurality of layers, forming a first dielectric layer over the hardmask, forming a sacrificial layer over the first dielectric layer, etching the sacrificial layer to expose a top surface of the first dielectric layer, depositing a second dielectric layer in direct contact with exposed surfaces of the first dielectric layer and the sacrificial layer, removing a layer of the plurality of layers of the fin stack to define an air gap within the fin stack, and forming triangle-shaped epitaxial growths within the air gap defined within the fin stack.

A method is presented for controlling an electric field from a gate structure. The method includes forming a hardmask over a fin stack including a plurality of layers, forming a first dielectric layer over the hardmask, forming a sacrificial layer over the first dielectric layer, etching the sacrificial layer to expose a top surface of the first dielectric layer, depositing a second dielectric layer in direct contact with exposed surfaces of the first dielectric layer and the sacrificial layer, removing a layer of the plurality of layers of the fin stack to define an air gap within the fin stack, and forming triangle-shaped epitaxial growths within the air gap defined within the fin stack.

A field emission transistor includes a gate, a fold over emitter, and fold over collector. The emitter and the collector are separated from the gate by a void and are separated from a gate contact by gate contact dielectric. The void may be a vacuum, ambient air, or a gas. Respective ends of the emitter and the collector are separated by a gap. Electrons are drawn across gap from the emitter to the collector by an electrostatic field created when a voltage is applied to the gate. The emitter and collector include a first conductive portion substantially parallel with gate and a second conductive portion substantially perpendicular with gate. The second conductive portion may be formed by bending a segment of the first conductive portion. The second conductive portion is folded inward from the first conductive portion towards the gate. Respective second conductive portions are generally aligned.