A nano-vacuum tube (NVT) transistor comprising a source having a knife edge, a drain, and a channel formed between the source and the drain, the channel having a width to provide a pseudo-vacuum in a normal atmosphere. The NVT transistor utilizing a space charge plasma formed at the knife edge within the channel.

A semiconductor device may include the following elements: a semiconductor substrate, an insulator positioned on the substrate, a source electrode positioned on the insulator, a drain electrode positioned on the insulator, a gate electrode positioned between the source electrode and the drain electrode, a hollow channel surrounded by the gate electrode and positioned between the source electrode and the drain electrode, a dielectric member positioned between the hollow channel and the gate electrode, a first insulating member positioned between the gate electrode and the source electrode, and a second insulating member positioned between the gate electrode and the drain electrode.

A semiconductor device may include the following elements: a semiconductor substrate, an insulator positioned on the substrate, a source electrode positioned on the insulator, a drain electrode positioned on the insulator, a gate electrode positioned between the source electrode and the drain electrode, a hollow channel surrounded by the gate electrode and positioned between the source electrode and the drain electrode, a dielectric member positioned between the hollow channel and the gate electrode, a first insulating member positioned between the gate electrode and the source electrode, and a second insulating member positioned between the gate electrode and the drain electrode.

A semiconductor device may include the following elements: a semiconductor substrate, an insulator positioned on the substrate, a source electrode positioned on the insulator, a drain electrode positioned on the insulator, a gate electrode positioned between the source electrode and the drain electrode, a hallow channel surrounded by the gate electrode and positioned between the source electrode and the drain electrode, a dielectric member positioned between the hollow channel and the gate electrode, a first insulating member positioned between the gate electrode and the source electrode, and a second insulating member positioned between the gate electrode and the drain electrode.

A semiconductor device may include the following elements: a semiconductor substrate, an insulator positioned on the substrate, a source electrode positioned on the insulator, a drain electrode positioned on the insulator, a gate electrode positioned between the source electrode and the drain electrode, a hallow channel surrounded by the gate electrode and positioned between the source electrode and the drain electrode, a dielectric member positioned between the hollow channel and the gate electrode, a first insulating member positioned between the gate electrode and the source electrode, and a second insulating member positioned between the gate electrode and the drain electrode.

A semiconductor device may include the following elements: a semiconductor substrate, an insulator positioned on the substrate, a source electrode positioned on the insulator, a drain electrode positioned on the insulator, a gate electrode positioned between the source electrode and the drain electrode, a hollow channel surrounded by the gate electrode and positioned between the source electrode and the drain electrode, a dielectric member positioned between the hollow channel and the gate electrode, a first insulating member positioned between the gate electrode and the source electrode, and a second insulating member positioned between the gate electrode and the drain electrode.

A semiconductor device may include the following elements: a semiconductor substrate, an insulator positioned on the substrate, a source electrode positioned on the insulator, a drain electrode positioned on the insulator, a gate electrode positioned between the source electrode and the drain electrode, a hollow channel surrounded by the gate electrode and positioned between the source electrode and the drain electrode, a dielectric member positioned between the hollow channel and the gate electrode, a first insulating member positioned between the gate electrode and the source electrode, and a second insulating member positioned between the gate electrode and the drain electrode.

Vacuum transistors with carbon nanotube as the collector and/or emitter electrodes are provided. In one aspect, a method for forming a vacuum transistor includes the steps of: covering a substrate with an insulating layer; forming a back gate(s) in the insulating layer; depositing a gate dielectric over the back gate; forming a carbon nanotube layer on the gate dielectric; patterning the carbon nanotube layer to provide first/second portions thereof over first/second sides of the back gate, separated from one another by a gap G, which serve as emitter and collector electrodes; forming a vacuum channel in the gate dielectric; and forming metal contacts to the emitter and collector electrodes. Vacuum transistors are also provided.

An electron emitter that consists of: a low work function material including Lanthanum hexaboride or Iridium Cerium that acts as an emitter, a cylinder base made of high work function material that has a cone shape where the low work function material is embedded in the high work function material but is exposed at end of the cone and the combined structure is heated and biased to a negative voltage relative to an anode, an anode electrode that has positive bias relative to the emitter, and a wehnelt electrode with an aperture where the cylindrical base protrudes through the wehnelt aperture so the end of the cone containing the emissive area is placed between the wehnelt and the anode.

An electron emitter that consists of: a low work function material including Lanthanum hexaboride or Iridium Cerium that acts as an emitter, a cylinder base made of high work function material that has a cone shape where the low work function material is embedded in the high work function material but is exposed at end of the cone and the combined structure is heated and biased to a negative voltage relative to an anode, an anode electrode that has positive bias relative to the emitter, and a wehnelt electrode with an aperture where the cylindrical base protrudes through the wehnelt aperture so the end of the cone containing the emissive area is placed between the wehnelt and the anode.