A manufacturing method of a package substrate includes forming a patterned first dielectric layer on a carrier; forming a first wiring layer on a first surface of the first dielectric layer facing away from the carrier, a wall surface facing one of the openings of the first dielectric layer, and the carrier in one of the openings; forming a first conductive pillar layer on the first wiring layer on the first surface; forming a second dielectric layer on the first surface, the first wiring layer, and the openings, wherein the first conductive pillar layer is exposed from the second dielectric layer; forming a second wiring layer on the exposed first conductive pillar layer and the second dielectric layer; forming an electrical pad layer on the second wiring layer; and forming a third dielectric layer on the second dielectric layer and the second wiring layer.

Some embodiments relate to micro vias in printed circuit boards (PCBs). In an example, a PCB may include a PCB substrate and a micro via. The micro via may extend between opposing surfaces of the PCB substrate and may have a diameter less than or equal to about 100 microns. In another example, a method of forming micro vias in a PCB may include forming a through hole in a PCB substrate of the PCB. The method may also include positioning a pillar that is electrically conductive within the through hole. The method may also include backfilling the through hole around the pillar with an epoxy backfill.

A method for making a circuit board comprising: providing a silver clad laminate comprising a substrate and two silver foils; forming at least one through hole on the silver clad laminate, the through hole comprises an annular middle wall and two annular edge walls connected to two sides of the annular middle wall; forming an organic conductive film on the annular middle wall; forming a dry film pattern layer on the second area; plating copper to form a copper circuit layer on the first area, and to form a via hole in the through hole; removing the dry film pattern layer; and etching the second area of the silver foil away. The first area changes to a silver circuit layer. The copper circuit layer and the silver circuit layer define a conductive circuit layer. A circuit board made by the method is also provided.

A method for preparing a conductive circuit can begin with the preparation of a non-conductive substrate having a top surface and a bottom surface, and then utilizing a pulse laser to create a top circuit pattern upon the top surface, a bottom circuit pattern upon the bottom surface, and a through hole connecting the top circuit pattern with the bottom circuit pattern. Subsequently, a conductive circuit is formed upon the top circuit pattern and the bottom circuit pattern and inside the through hole, wherein the conductive circuit is restricted from being formed upon the top surface outside of the top isolation region and the bottom surface outside of the bottom isolation region.

The present invention relates to electrically conductive paths in planar substrates. Various embodiments provide a method of forming one or more electrically conductive paths in a planar substrate, wherein substantially none of the substrate is removed during formation of the path. In various embodiments, by avoiding the removal of substrate during formation of the electrically conductive path, problems caused by residual substrate material can be advantageously avoided. In various embodiments, the planar substrate with the electrically conductive path can be used to make a planar fuel cell array.

Provided is a manufacturing method of a circuit board structure including steps as below. A glass film is provided on an electrostatic chuck (E-chuck). A dicing process is performed, such that at least one slit is formed in the glass film. A plurality of first conductive vias are formed in the glass film. A first circuit layer is formed on the glass film. A polymer layer is formed on the first circuit layer. The polymer layer covers surfaces of the first circuit layer and the glass film. A plurality of second conductive vias are formed in the polymer layer. A second circuit layer is formed on the polymer layer, such that a first circuit board structure is formed. A singulation process is performed, such that the first circuit board structure is divided into a plurality of second circuit board structures.

Provided is a landless multilayer circuit board and a manufacturing method thereof. The manufacturing method includes steps of forming a first circuit on a first substrate, patterning a photoresist layer to form at least one via between the first circuit and a second circuit, forming at least one connecting pillar in the at least one via, removing the photoresist layer, forming a second substrate to cover the at least one connect pillar, and forming the second circuit on the second substrate. The second circuit is connected to the first circuit through the at least one connecting pillar. When the second circuit is formed, the at least one via does not need to be filled, thereby making the second circuit flat.

A probe comprises a first end that contacts and separates from a test object and a second end that contacts a circuit board to perform inspection of the test object. The second end is provided with a rotation restricted portion that restricts rotation of the probe about the axial direction thereof. An extendable portion, which is freely extendable and contractible in the axial direction of the probe and has at least one spiral slit, is provided between the first end and the second end. The second end is formed by a tubular member. Also, at least two of the extendable portions are provided between the first end and the second end, and an intermediate portion is formed between the extendable portions.

A method is disclosed for making an interconnection component. The steps include forming a mask layer covering a first opening in a sheet-like element that has first and second opposed surfaces; forming a plurality of mask openings in the mask layer, wherein the first opening and a portion of the first surface are partly aligned with each mask opening; and forming electrical conductors on spaced apart portions of the first surface and on spaced apart portions of the interior surface within the first opening which are exposed by the mask openings. The element may consist essentially of a material having a coefficient of thermal expansion of less than 10 parts per million per degree Celsius. Each conductor may extend along an axial direction of the first opening and the first conductors may be fully separated from one another within the first opening.

A wiring substrate is manufactured by attaching an adhesive protective film to a metal-foiled laminate sheet, forming bottomed via holes by partially removing the film and an insulating film, filling conductive pastes into the holes, and peeling the film. A wiring substrate is manufactured by forming an adhesive protective layer so as to cover a patterned metal foil on a metal-foiled laminate sheet, forming bottomed step via holes by partially removing the layer and an insulating film, filling conductive pastes into the holes, and peeling off a protective film. The wiring substrate and the second wiring substrate are laminated in such a way that protruding parts of the pastes come into contact with respective protruding parts of the pastes.