Systems and methods are described for controlled crack propagation in a material using ultrasonic waves. A first stress in applied to the material such that the first stress is below a critical point of the material and is insufficient to initiate cracking of the material. A controlled ultrasound wave is then applied to the material causing the total stress applied at a crack tip in the material to exceed the critical point. In some implementations, the controlled cracking is used for wafering of a material.

The invention relates to a method for transferring at least one layer of material, comprising: producing first and second separating layers (108, 110), one against the other, on a first substrate (104); producing the layer to be transferred on the second separating layer (110); securing the layer to be transferred to a second substrate (106), forming a stack of different materials; and performing mechanical separation at the interface between the separating layers; in which the materials of the stack are such that the interface between the first and second separating layers has the weakest adhesion force, and the method comprises a step reducing an initial adhesion force of the interface between the first and second separating layers.

A method of fan-out processing includes providing or obtaining a fused glass laminate sheet or wafer having a core layer and a first clad layer and a second clad layer, the core layer comprising a core glass having a core glass coefficient of thermal expansion α.sub.core, the first clad layer and the second clad layer each comprising a clad glass having a clad glass coefficient of thermal expansion α.sub.clad, where α.sub.clad>α.sub.core; affixing integrated circuit devices to the second clad layer of the laminate sheet or wafer; forming a fan-out layer on or above the integrated circuit devices; and removing some of the first clad layer to decrease warp of the sheet or wafer with integrated circuit devices and a fan-out layer thereon. A method of producing a laminate sheet or wafer having a selected CTE is also disclosed.

A semiconductor analysis system includes a machining device that machines a semiconductor wafer to prepare a thin film sample for observation, a transmission electron microscope device that acquires a transmission electron microscope image of the thin film sample, and a host control device that controls the machining device and the transmission electron microscope device. The host control device evaluates the thin film sample based on the transmission electron microscope image, updates acquisition conditions of the transmission electron microscope image based on an evaluation result of the thin film sample, and outputs the updated acquisition conditions to the transmission electron microscope device

The present invention is a substrate for an electronic device, including a nitride semiconductor film formed on a joined substrate including a silicon single crystal, where the joined substrate has at least a bond wafer including a silicon single crystal joined on a base wafer including a silicon single crystal, the base wafer includes CZ silicon having a resistivity of 0.1 Ωcm or lower and a crystal orientation of <100>, and the bond wafer has a crystal orientation of <111>. This provides a substrate for an electronic device, having a suppressed warp.

A multi-zone heater with a plurality of thermocouples such that different heater zones can be monitored for temperature independently. The independent thermocouples may have their leads routed out from the shaft of the heater in a channel that is closed with a joining process that results in hermetic seal adapted to withstand both the interior atmosphere of the shaft and the process chemicals in the process chamber. The thermocouple and its leads may be enclosed with a joining process in which a channel cover is brazed to the heater plate with aluminum.

An optoelectronic or electronic device structure, including an active region on or above a polar substrate, wherein the active region comprises a polar p region. The device structure further includes a hole supply region on or above the active region. Holes in the hole supply region are driven by a field into the active region, the field arising at least in part due to a piezoelectric and/or spontaneous polarization field generated by a composition and grading of the active region.

A multi-zone heater with a plurality of thermocouples such that different heater zones can be monitored for temperature independently. The independent thermocouples may have their leads routed out from the shaft of the heater in a channel that is closed with a joining process that results in hermetic seal adapted to withstand both the interior atmosphere of the shaft and the process chemicals in the process chamber. The thermocouple and its leads may be enclosed with a joining process in which a channel cover is brazed to the heater plate with aluminum.

A method of fan-out processing includes providing or obtaining a fused glass laminate sheet or wafer having a core layer and a first clad layer and a second clad layer, the core layer comprising a core glass having a core glass coefficient of thermal expansion α.sub.core, the first clad layer and the second clad layer each comprising a clad glass having a clad glass coefficient of thermal expansion α.sub.clad, where α.sub.clad>α.sub.core; affixing integrated circuit devices to the second clad layer of the laminate sheet or wafer; forming a fan-out layer on or above the integrated circuit devices; and removing some of the first clad layer to decrease warp of the sheet or wafer with integrated circuit devices and a fan-out layer thereon. A method of producing a laminate sheet or wafer having a selected CTE is also disclosed.

A method for manufacturing a bonded SOI wafer, the method using a silicon single crystal wafer having a resistivity of 100 Ω.Math.cm or more as the base wafer, and including steps of: forming an underlying insulator film on a bonding surface side of the base wafer; depositing a polycrystalline silicon layer on a surface of the underlying insulator film; polishing a surface of the polycrystalline silicon layer; modifying the polycrystalline silicon layer by performing ion implantation on the polished polycrystalline silicon layer to form a modified silicon layer; forming the insulator film on a bonding surface of the bond wafer; bonding the bond wafer and a surface of the modified silicon layer of the base wafer with the insulator film interposed therebetween; and thinning the bonded bond wafer to form an SOI layer. This provides a bonded SOI wafer excellent in harmonic wave characteristics.