A method of manufacturing a display substrate includes: providing a base substrate; and forming a base insulating layer, a first conductive layer and an interlayer insulating layer that are sequentially stacked on top of one another at a side of the base substrate. The first conductive layer includes at least one break face, the base insulating layer includes a portion extending outward with respect to each of the at least one break face, and the break face and the corresponding portion extending outward constitute an unevenness portion having a stepped shape. The interlayer insulating layer covers at least the unevenness portion(s). Forming the interlayer insulating layer, includes: forming a first insulating sub-layer and a second insulating sub-layer that are sequentially stacked on top of one another; and forming one of the first insulating sub-layer and the second insulating sub-layer by curing a flowable insulating material.

Provided is a display panel, including: a substrate provided with a display region and a non-display region disposed at a periphery of the display region; a plurality of first power signal lines and a plurality of drive signal lines that are disposed in the display region; and a power connection bus, a plurality of first fan-out leads, and a plurality of second fan-out leads that are disposed in the non-display region, wherein the power connection bus is electrically connected to the first power signal line and the first fan-out lead respectively; the plurality of second fan-out leads are electrically connected to the plurality of drive signal lines in a one-to-one correspondence; each first fan-out lead is disposed between every two adjacent second fan-out leads; and the plurality of first fan-out leads and the plurality of second fan-out leads are both configured to be electrically connected to a driving chip.

A display substrate and a display device are provided. The display substrate includes: a base substrate including a display area (AA) and a peripheral area (PA); a plurality of sub-pixels (Pxl); a plurality of pins a plurality of leads located in the peripheral area (PA), wherein the plurality of pins electrically connected to the plurality of sub-pixels (Pxl) through the plurality of leads ; a plurality of extension pads electrically connected to the plurality of pins; and a plurality of spacers configured to electrically insulate the plurality of extension pads from each other , wherein orthographic projections of the plurality of spacers on the base substrate do not overlap orthographic projections of the plurality of extension pads on the base substrate .

Disclosed are an array substrate and a display panel, including: a base substrate; and a wiring layer and a light-emitting layer which are stacked on the base substrate sequentially, wherein the wiring layer includes a signal wiring, a first wiring and a second wiring, a projection of the first wiring on the base substrate is separated from a projection of the second wiring on the base substrate, the first and second wiring are respectively disposed on two sides of the light-emitting layer below the light-emitting layer, the signal wiring is between the first and second wiring, the projections of the first and second wiring on the base substrate respectively overlap projections of two edges of the light-emitting layer on the base substrate, and a length of the second wiring is less than that of the signal wiring in an extension direction of the signal wiring.

A flexible display panel and a preparation method therefor, a display apparatus, and a tiled display apparatus. The flexible display panel is provided with a display area and a peripheral area located on the periphery of the display area, the peripheral area comprising at least one bent area and a folded area located on a side of each bent area away from the display area. The flexible display panel comprises: a flexible substrate and a frame circuit that is disposed on the flexible substrate and is located in the peripheral area, at least a portion of the frame circuit being located in the folded area. The portion of the flexible display panel that is located in the folded area is configured to, by means of the portion located in the bent area, be folded in the direction away from the display side of the flexible display panel.

A parallel structure comprising source/drain and channel layers alternately stacked on a substrate, and gate stacks formed around peripheries of the channel layers. Each of the channel layers, the source/drain layers on upper and lower sides of the channel layer, and the gate stack formed around the channel layer, form a semiconductor device. In each semiconductor device, one of the source/drain layers is in contact with a first electrically-conductive channel disposed on an outer periphery of the active region, the other is in contact with a second electrically-conductive channel on the outer periphery of the active region, and the gate stack is in contact with a third electrically-conductive channel disposed on the outer periphery of the active region. The first electrically-conductive channel is common to the semiconductor devices, the second electrically-conductive channel is common to the semiconductor devices, and the third electronically-conductive channel is common to the semiconductor devices.

A parallel structure comprising source/drain and channel layers alternately stacked on a substrate, and gate stacks formed around peripheries of the channel layers. Each of the channel layers, the source/drain layers on upper and lower sides of the channel layer, and the gate stack formed around the channel layer, form a semiconductor device. In each semiconductor device, one of the source/drain layers is in contact with a first electrically-conductive channel disposed on an outer periphery of the active region, the other is in contact with a second electrically-conductive channel on the outer periphery of the active region, and the gate stack is in contact with a third electrically-conductive channel disposed on the outer periphery of the active region. The first electrically-conductive channel is common to the semiconductor devices, the second electrically-conductive channel is common to the semiconductor devices, and the third electronically-conductive channel is common to the semiconductor devices.

The present disclosure provides a display substrate and a display device. The display substrate includes a base substrate, and a transistor, an anti-static wire, a first anti-static resistor and a first ground bonding pad on the base substrate, wherein a first terminal of the first anti-static resistor is electrically connected to a first end of the anti-static wire, a second terminal of the first anti-static resistor is electrically connected to the first ground bonding pad, and the first anti-static resistor is at a different layer from a layer at which the anti-static wire is located and a layer at which the first ground bonding pad is located, and is at a same layer as an active layer of the resistor.

A display substrate, a method for manufacturing the same, and a display device are provided. The display substrate includes a base substrate, and a drive circuit layer disposed on the base substrate, the display substrate having an active area and a fan-out area, the drive circuit layer being provided with a crack-stopping groove therein, the crack-stopping groove being located between the active area and the fan-out area. According to the embodiments of the present disclosure, with the crack-stopping groove provided between the active area and the fan-out area, in the case where a crack occurs in a structure in the active area of the display substrate, the crack is prevented from extending to the fan-out area by isolation of the crack-stopping groove, thereby reducing the possibility of structures in the fan-out area of the display panel being damaged and improving the reliability of the display panel.

The present disclosure discloses a display panel and a display device. The display panel includes: a base substrate, including a plurality of substrate via holes located in a display area of the display panel; and a plurality of driving signal lines and a plurality of bonding terminals, respectively located on different sides of the base substrate. At least one of the plurality of driving signal lines is electrically connected to at least one of the plurality of bonding terminals through the substrate via hole(s).