A method for manufacturing an array substrate, including: forming a plurality of first metal layer patterns on a base substrate which are independent from each other, each of the plurality of first metal layer patterns including an end at a non-display region of the array substrate; forming an insulating layer on the plurality of first metal layer patterns; and forming a semiconductor pattern on the insulating layer, a portion of semiconductor pattern is disposed directly opposite to the end of the first metal layer patterns.

The present disclosure provides a display back plate and a fabricating method thereof and a display device. The display back plate includes a base layer. A plurality of recesses are formed in the base layer, and a plurality of sub-pixels are formed in the plurality of recesses. The sub-pixel includes a first electrode layer, which is formed in the recess, a light-emitting material layer, which is formed on the first electrode layer, and a second electrode layer, which is formed on the light-emitting material layer. Thickness differences exist among a plurality of the light-emitting material layers, and upper surfaces of the plurality of light-emitting material layers are positioned on the same plane.

A display substrate, a manufacturing method thereof and a display device are provided, and the display substrate includes pixel units, each of the pixel units is provided with a thin film transistor, a pixel electrode and a common electrode; the pixel electrode and the common electrode are arranged in a same layer and insulated from each other, the pixel electrode includes a plurality of strip-shaped pixel sub-electrodes, the common electrode includes a plurality of strip-shaped common sub-electrodes, the plurality of strip-shaped pixel sub-electrodes (104) and the plurality of strip-shaped common sub-electrodes are alternately distributed, and an interval width between each pixel sub-electrode and each common sub-electrode adjacent to the pixel sub-electrode is from 1 μm to 5 μm. The display substrate is configured for solving the problem of low charging rate in large size display panels.

A display substrate, a manufacturing method thereof and a display device are provided, and the display substrate includes pixel units, each of the pixel units is provided with a thin film transistor, a pixel electrode and a common electrode; the pixel electrode and the common electrode are arranged in a same layer and insulated from each other, the pixel electrode includes a plurality of strip-shaped pixel sub-electrodes, the common electrode includes a plurality of strip-shaped common sub-electrodes, the plurality of strip-shaped pixel sub-electrodes (104) and the plurality of strip-shaped common sub-electrodes are alternately distributed, and an interval width between each pixel sub-electrode and each common sub-electrode adjacent to the pixel sub-electrode is from 1 μm to 5 μm. The display substrate is configured for solving the problem of low charging rate in large size display panels.

An array substrate, a method for fabricating the array substrate and a display device are described. The array substrate includes: a first gate electrode metal layer; a first gate insulation layer; an active layer on the first gate insulation layer; an etching barrier layer on the active layer; a source-drain metal layer including a source electrode and a drain electrode that contact with two sides of the active layer respectively; a second gate insulation layer on the source-drain metal layer; and a second gate electrode metal layer on the second gate insulation layer. The array substrate has an optimized TFT performance and a reduced gate line resistance, and light may be blocked from irradiating on the active layer, which is beneficial to restrain IR Drop, drifting of TFT threshold voltages or generation of a light-incurred leakage current on the active layer. Performance of the display device is improved.

An array substrate, a method for fabricating the array substrate and a display device are described. The array substrate includes: a first gate electrode metal layer; a first gate insulation layer; an active layer on the first gate insulation layer; an etching barrier layer on the active layer; a source-drain metal layer including a source electrode and a drain electrode that contact with two sides of the active layer respectively; a second gate insulation layer on the source-drain metal layer; and a second gate electrode metal layer on the second gate insulation layer. The array substrate has an optimized TFT performance and a reduced gate line resistance, and light may be blocked from irradiating on the active layer, which is beneficial to restrain IR Drop, drifting of TFT threshold voltages or generation of a light-incurred leakage current on the active layer. Performance of the display device is improved.

The present disclosure provides an array substrate, a method for fabricating the same and a display apparatus, which belongs to the field of display technology and may alleviate at least a problem of wide bezel of a display apparatus in the related art. The array substrate includes a display region and a periphery region abutting the display region, the display region being provided with a plurality of AM-OLEDs therein. The array substrate further includes a plurality of PM-OLEDs provided in the periphery region, wherein both of the plurality of AM-OLEDs and the plurality of PM-OLEDs are electrically connected to a power supply driving unit. Since the plurality of PM-OLEDs capable of emitting light are disposed in the periphery region, the array substrate according to the present disclosure can realize a narrow-bezel design.

The embodiments of the present invention provide an OLED array substrate, a method for manufacturing the OLED array substrate, and a touch display device. The OLED array substrate includes a first metal layer pattern, a transparent conductive layer pattern, an insulating layer pattern disposed between the first metal layer pattern and the transparent conductive layer pattern. The first metal layer pattern includes a metal bridge line. The transparent conductive layer pattern includes an anode of an OLED, a plurality of first electrodes extending in a first direction and a plurality of second electrodes extending in a second direction. Each of the first electrodes includes a plurality of first sub-electrodes, and each of the first sub-electrodes is electrically connected to a corresponding metal bridge line.

Preparation method for a thin film transistor, preparation method for an array substrate, an array substrate, and a display apparatus are provided. The preparation method for a thin film transistor includes: forming, on a pattern of a semiconductor layer, a first photoresist pattern including a photoresist with two different thicknesses, and performing a heavily-doped ion implantation process on the pattern of the semiconductor layer by using the first photoresist pattern as a barrier mask; ashing the first photoresist pattern to remove the photoresist with a second thickness and to thin the photoresist with a first thickness, so as to form a second photoresist pattern; and performing a lightly-doped ion implantation process on the pattern of the semiconductor layer by using the second photoresist pattern as a barrier mask.

Preparation method for a thin film transistor, preparation method for an array substrate, an array substrate, and a display apparatus are provided. The preparation method for a thin film transistor includes: forming, on a pattern of a semiconductor layer, a first photoresist pattern including a photoresist with two different thicknesses, and performing a heavily-doped ion implantation process on the pattern of the semiconductor layer by using the first photoresist pattern as a barrier mask; ashing the first photoresist pattern to remove the photoresist with a second thickness and to thin the photoresist with a first thickness, so as to form a second photoresist pattern; and performing a lightly-doped ion implantation process on the pattern of the semiconductor layer by using the second photoresist pattern as a barrier mask.