H01L21/77

Thin film transistor, pixel structure, and method for manufacturing the same, array substrate and display device
09741750 · 2017-08-22 · ·

A thin film transistor, a pixel structure, an array substrate, a display device, a method for manufacturing a thin film transistor, and a method for manufacturing a pixel structure are disclosed. The thin film transistor includes a gate electrode, a source electrode and a drain electrode, wherein a first passivation layer made from an aluminum oxide material is provided on the source electrode and the drain electrode, and an active layer made from an aluminum oxide material doped with ions is provided in a region of the first passivation layer corresponding to the gate electrode. Since the first passivation layer as insulation material is doped with the ions to form an active layer, the etching stop layer may be omitted, thereby simplifying the structure of the thin film transistor.

Thin film transistor, pixel structure, and method for manufacturing the same, array substrate and display device
09741750 · 2017-08-22 · ·

A thin film transistor, a pixel structure, an array substrate, a display device, a method for manufacturing a thin film transistor, and a method for manufacturing a pixel structure are disclosed. The thin film transistor includes a gate electrode, a source electrode and a drain electrode, wherein a first passivation layer made from an aluminum oxide material is provided on the source electrode and the drain electrode, and an active layer made from an aluminum oxide material doped with ions is provided in a region of the first passivation layer corresponding to the gate electrode. Since the first passivation layer as insulation material is doped with the ions to form an active layer, the etching stop layer may be omitted, thereby simplifying the structure of the thin film transistor.

Display Panel And Manufacturing Method For The Same

A display panel and manufacturing method. The method includes: forming a source electrode, a drain electrode and a channel on a substrate; depositing a first insulation layer; forming multiple color photoresists on the first insulation layer, and the source electrode, the drain electrode and the channel are located between two adjacent color photoresists; forming a gate electrode and a common electrode by a same process, and the gate electrode is located on the first insulation layer, and the common electrode is located on the photoresist; forming a second insulation layer having a through hole communicated with the source electrode on the gate electrode and the common electrode; forming a pixel electrode on the second insulation layer. The pixel electrode contacts with the source electrode through the through hole, and a storage capacitor is formed. The storage capacitor can be increased and the current leakage of the pixel electrode improved.

Array substrate manufacturing method, array substrate formed thereby and liquid crystal display apparatus

An array substrate manufacturing method, an array substrate formed by the method, and a liquid crystal apparatus are disclosed. The method includes steps of depositing a first metal layer to form a plurality of scanning lines; depositing a first insulating layer and performing a patterning process on the first insulating layer; depositing a semiconductor layer and a second metal layer to form a plurality of data lines and thin-film transistors; depositing a second insulating layer to form a plurality of contact holes; and depositing a transparent layer to form a plurality of pixel electrodes.

Array substrate manufacturing method, array substrate formed thereby and liquid crystal display apparatus

An array substrate manufacturing method, an array substrate formed by the method, and a liquid crystal apparatus are disclosed. The method includes steps of depositing a first metal layer to form a plurality of scanning lines; depositing a first insulating layer and performing a patterning process on the first insulating layer; depositing a semiconductor layer and a second metal layer to form a plurality of data lines and thin-film transistors; depositing a second insulating layer to form a plurality of contact holes; and depositing a transparent layer to form a plurality of pixel electrodes.

ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF, AND DISPLAY PANEL
20220308415 · 2022-09-29 ·

The present disclosure provides an array substrate and a manufacturing method thereof, and a display panel. The array substrate includes at least one marking member in at least one marking sub-region and at least one bonding lead in at least one bonding sub-region, and the at least one marking sub-region and/or the at least one bonding sub-region are further provided with: a first substrate; a first reflecting layer on the first substrate; and a first light absorbing layer on a side of the first reflecting layer distal to the first substrate. The at least one marking member and/or the at least one bonding lead is on a side of the first light absorbing layer distal to the first substrate.

PANEL STRUCTURES OF FLAT DISPLAYS AND MANUFACTURING METHODS

The present disclosure discloses a panel structure of flat displays and the manufacturing method thereof. The panel structure includes a first signal line, a second signal line, a transparent conductive film, and a scanning line. The transparent conductive film includes a first branch, a second branch, and a third branch. A first end of the first branch and a first end of the second branch are connected by a predetermined first angle, and a second end of the second branch and a first end of the third branch are connected by a predetermined second angle. The first branch, the second branch, and the third branch form the arch-shaped frame. The first signal line connects to the second end of the first branch, and the second signal line connects to the second end of the third branch. The scanning line passes through the arch-shaped frame along a first direction.

ACTIVE MATRIX ORGANIC LIGHT EMITTING DIODE ARRAY SUBSTRATE, FABRICATING METHOD, AND DISPLAY APPARATUS
20170221762 · 2017-08-03 · ·

In some embodiments of the disclosed subject matter provides an active matrix organic light emitting diode array substrate, comprising; multiple pixel units in an array on a base substrate, adjacent pixel units are separated by a pixel defining layer, each pixel unit comprises a thin film transistor and an organic light emitting diode; an insulating layer between a source/drain electrode layer of the thin film transistor and an electrode layer of the organic light emitting diode; the insulating layer includes a via hole therein, the electrode layer comprises a recess part connecting with the source/drain electrode layer in the via hole; and a filling layer on the recess part for preventing an organic light emitting layer of the organic light emitting diode being inside of the recess part, the pixel defining layer and an organic light emitting layer of the organic light emitting diode are overlaid on the filling layer.

ACTIVE MATRIX ORGANIC LIGHT EMITTING DIODE ARRAY SUBSTRATE, FABRICATING METHOD, AND DISPLAY APPARATUS
20170221762 · 2017-08-03 · ·

In some embodiments of the disclosed subject matter provides an active matrix organic light emitting diode array substrate, comprising; multiple pixel units in an array on a base substrate, adjacent pixel units are separated by a pixel defining layer, each pixel unit comprises a thin film transistor and an organic light emitting diode; an insulating layer between a source/drain electrode layer of the thin film transistor and an electrode layer of the organic light emitting diode; the insulating layer includes a via hole therein, the electrode layer comprises a recess part connecting with the source/drain electrode layer in the via hole; and a filling layer on the recess part for preventing an organic light emitting layer of the organic light emitting diode being inside of the recess part, the pixel defining layer and an organic light emitting layer of the organic light emitting diode are overlaid on the filling layer.

3D SEMICONDUCTOR DEVICE AND SYSTEM

A 3D integrated circuit device, including: a first transistor; a second transistor; and a third transistor, where the third transistor is overlaying the second transistor and the third transistor is controlled by a third control line, where the second transistor is overlaying the first transistor and the second transistor is controlled by a second control line, where the first transistor is part of a control circuit controlling the second control line and the third control line, and where the second transistor and the third transistor are self-aligned.