H01L22/22

Semiconductor device and manufacturing method thereof

A semiconductor device and manufacturing method thereof. Various aspects of the disclosure may, for example, comprise connection verification for a first one or more mounted components prior to additional assembly.

Semiconductor device and method of testing semiconductor device
09823291 · 2017-11-21 · ·

A semiconductor device includes: a plurality of semiconductor chips; and a connecting portion that connects a plurality of terminals formed on the plurality of semiconductor chips, wherein the plurality of terminals of the plurality of semiconductor chips belong to one of first group or second group, an interval between one of first terminals belonging to the first group and one of second terminals belonging to the second group is a predetermined interval, the one of the second terminals being adjacent to the one of the first terminal, the first terminals are arranged at an interval larger than the predetermined interval, and each of the plurality of semiconductor chips includes a selecting portion that selects a signal transmitting terminal among the plurality of terminals, per each of the groups.

PRESSURE-ACTIVATED ELECTRICAL INTERCONNECTION BY MICRO-TRANSFER PRINTING

A printed electrical connection structure includes a substrate having one or more electrical connection pads and a micro-transfer printed component having one or more connection posts. Each connection post is in electrical contact with a connection pad. A resin is disposed between and in contact with the substrate and the component. The resin has a reflow temperature less than a cure temperature. The resin repeatedly flows at the reflow temperature when temperature-cycled between an operating temperature and the reflow temperature but does not flow after the resin is exposed to a cure temperature. A solder can be disposed on the connection post or the connection pad. After printing and reflow, the component can be tested and, if the component fails, another component is micro-transfer printed to the substrate, the resin is reflowed again, the other component is tested and, if it passes the test, the resin is finally cured.

Intermediate Structure for Transfer, Method for Preparing Micro-device for Transfer, and Method for Processing Array of Semiconductor Device

A method for preparing a plurality of micro-devices for transfer includes temporarily bonding the micro-devices onto a carrier substrate; testing the micro-devices on the carrier substrate to determine if there is at least one first failed micro-device in the micro-devices; and removing the first failed micro-device from the carrier substrate.

Correction Die for Wafer/Die Stack
20170250161 · 2017-08-31 · ·

Representative implementations of devices and techniques provide correction for a defective die in a wafer-to-wafer stack or a die stack. A correction die is coupled to a die of the stack with the defective die. The correction die electrically replaces the defective die. Optionally, a dummy die can be coupled to other die stacks of a wafer-to-wafer stack to adjust a height of the stacks.

Methods, apparatus, and systems for secure demand paging and other paging operations for processor devices

A secure demand paging system includes a secure internal memory having a table relating physical addresses to virtual addresses, a non-volatile memory, a decryption module and a hash module between the secure memory and the non-volatile memory to allow for decryption and integrity verification of data stored in the non-volatile memory during a transfer to said secure memory and means for connecting the secure memory to a volatile page swap memory such that the non-volatile memory is bypassable during a page swap.

Low-dispersion component in an electronic chip

A method of manufacturing electronic chips containing low-dispersion components, including the steps of: mapping the average dispersion of said components according to their position in test semiconductor wafers; associating, with each component of each chip, auxiliary correction elements; activating by masking the connection of the correction elements to each component according to the initial mapping.

Semiconductor device and method of testing semiconductor device

A semiconductor device includes chips, wherein a first chip: an internal circuit; first selectors to output signals from one of first outputs; second selectors to output signals from one of second outputs; first output buffer units to relay/interrupt signals output from one of the first outputs; second output buffer units to relay/interrupt signals output from one of the second outputs; first terminals to output a signal from the respective first output buffer units and belong to a first group in which the first terminals are placed at positions distant by first distances; and second terminals to output a signal from the respective second output buffer units and belong to a second group in which the second terminals are placed at positions distant by second distances and each of the second terminals is placed at a position distant from an adjacent first terminal of the first terminals by third distances.

INTEGRATED CIRCUIT SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME

A method of manufacturing a wafer. The method includes providing a wafer and testing the wafer. Based on a test result, a substance is selectively provided on the wafer to obtain an altered wafer that has at least one selected portion altered. The method includes forming a structural layer over the altered wafer.

INTEGRATED CIRCUIT SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME

A method of manufacturing a wafer. The method includes providing a wafer that includes a plurality of semiconductor device structures, and testing at least one of the plurality of semiconductor device structures. Based on a test result, a liquid is provided on a selected portion of the wafer to selectively alter at least one circuit element within the at least one of the plurality of semiconductor device structures.