Patent classifications
H01L22/22
Device and method for alignment of vertically stacked wafers and die
A device is provided that includes a first die having a first alignment structure that includes a plurality of first transmission columns arranged in a pattern and a second die positioned on the first die, the second die having a second alignment structure that includes a plurality of second transmission columns arranged in the same pattern as the first transmission columns. The first and second transmission columns are each coplanar with a first surface and a second surface of the first and second die, respectively.
DISPLAY SUBSTRATE AND METHOD FOR DETECTING BROKEN FANOUT WIRE OF DISPLAY SUBSTRATE
The present application provides a method for detecting a broken fanout wire of a display substrate, and a display substrate, and belongs to the field of display technology. In the method for detecting a broken fanout wire, the display substrate includes a base substrate having first and second surfaces opposite to each other, and a plurality of connection structures disposed at intervals on the first surface; and each connection structure includes first and second pads and a fanout wire electrically connecting the first pad to the second pad. The method for detecting a broken fanout wire includes: forming at least one detection unit, which includes: connecting at least two connection structures in series through a connecting part; and measuring a head and an end of the detection unit to obtain resistance of the detection unit, and determining whether there is a broken fanout wire in the detection unit.
METHOD FOR DETECTING RESISTANCE OF SIDE TRACE OF DISPLAY SUBSTRATE AND DISPLAY SUBSTRATE
The present disclosure provides a method for detecting resistance of a side trace of a display substrate and the display substrate, and belongs to the field of display technology. In the method for detecting resistance of a side trace of a display substrate, the display substrate includes: a base substrate including a first surface and a second surface opposite to each other; a plurality of first pads at intervals on the first surface; and a plurality of second pads at intervals on the second surface; the first pad is electrically connected to a corresponding second pad through a side trace; the method includes forming at least one detection unit; wherein forming the detection unit includes: connecting two first pads through a connection part; and detecting two second pads in the detection unit, and obtaining resistance of the detection unit to obtain the resistance of the side trace.
DISPLAY PANEL AND METHOD OF MANUFACTURING SAME
A display panel and a method of manufacturing the display panel are provided. Wherein, a display region of the display panel includes a plurality of gate lines extending laterally and a gate repair line, a plurality of gate connection lines extending longitudinally to a non-display region, and a first connection repair line extending longitudinally. The gate repair line is connected to the first connection repair line in a one-to-one correspondence, each of the gate repair line is provided with a plurality of first connection repair points, and each of the first connection repair lines is provided with a plurality of second connection repair points.
LIGHT-EMITTING DIODE DISPLAY AND METHOD FOR FABRICATING THE SAME
A light-emitting diode display and a method for fabricating the same is disclosed. The light-emitting diode display includes a driving backplane and a plurality of pixel units. Each of the plurality of pixel units includes at least one light-emitting diode and a package substrate. The top surface of the package substrate has at least one conductive position and at least one conductive vacant position corresponding to the at least one conductive position. The conductive position is provided with the light-emitting diode. The conductive position is electrically connected to the light-emitting diode. The bottom surface of the package substrate of each pixel unit is arranged on the driving backplane. The driving backplane is electrically connected to the light-emitting diode and the corresponding conductive vacant position of each pixel unit thereon.
Apparatus and method for multi-die interconnection
A semiconductor and a method of fabricating the semiconductor having multiple, interconnected die including: providing a semiconductor substrate having a plurality of disparate die formed within the semiconductor substrate, and a plurality of scribe lines formed between pairs of adjacent die of the plurality of disparate die; and fabricating, by a lithography system, a plurality of inter-die connections that extend between adjacent pair of die of the plurality of die.
Manufacturing method and manufacturing apparatus for stacked substrate, and program
A manufacturing method for manufacturing a stacked substrate by bonding two substrates includes: acquiring information about crystal structures of a plurality of substrates; and determining a combination of two substrates to be bonded to each other, based on the information about the crystal structures. In the manufacturing method described above, the information about the crystal structures may include at least one of plane orientations of bonding surfaces and crystal orientations in a direction in parallel with the bonding surfaces. In the manufacturing methods described above, the determining may include determining a combination of the two substrates with a misalignment amount after bonding being equal to or smaller than a predetermined threshold.
DIE-TO-WAFER BONDING STRUCTURE AND SEMICONDUCTOR PACKAGE USING THE SAME
According to an aspect of the inventive concept, there is provided a die-to-wafer bonding structure including a die having a first test pad, a first bonding pad formed on the first test pad, and a first insulating layer, the first bonding pad penetrates the first insulating layer. The structure may further include a wafer having a second test pad, a second bonding pad formed on the second test pad, and a second insulating layer, the second bonding pad penetrates the second insulating layer. The structure may further include a polymer layer surrounding all side surfaces of the first bonding pad and all side surfaces of the second bonding pad, the polymer layer being arranged between the die and the wafer. Additionally, the wafer and the die may be bonded together.
Adhesion device, micro device optical inspection and repairing equipment and optical inspection and repairing method
Micro device optical inspection and repairing equipment adopting an adhesion device is provided. The micro device optical inspection and repairing equipment includes a carrying stage, an optical inspection module and at least one adhesion device. The optical inspection module is arranged corresponding to the carrying stage so as to capture image information and obtain a position coordinate from the image information. The adhesion device includes a main body and an adhesive portion. The adhesive portion is connected to the main body. The adhesion device can move to a target position of the carrying stage according to the position coordinate. The main body is adapted to drive the adhesive portion to move to the target position along a moving axis. An optical inspection and repairing method adopting the micro device optical inspection and repairing equipment is also provided.
Bottom emission microLED display and a repair method thereof
A bottom emission microLED display includes a microLED disposed above a transparent substrate; a light guiding layer surrounding the microLED to controllably guide light generated by the microLED towards the transparent substrate; and a reflecting layer formed over the light guiding layer to reflect the light generated by the microLED downwards and to confine the light generated by the microLED to prevent the light from leaking upwards or sidewards.