H01L23/13

Semiconductor device package having warpage control and method of forming the same

A semiconductor device package and a method of forming the same are provided. The semiconductor device package includes a substrate, an electronic component, a ring structure, and an adhesive layer. The electronic component is located over a first surface of the substrate. The ring structure is located over the first surface of the substrate and surrounding the electronic component. The ring structure has a bottom surface facing the first surface of the substrate and a top surface opposite the bottom surface. The ring structure includes a plurality of side parts and a plurality of corner parts recessed from the top surface and thinner than the side parts. Any two of the corner parts are separated from one another by one of the side parts. The adhesive layer is interposed between the bottom surface of the ring structure and the first surface of the substrate.

Pre-molded lead frames for semiconductor packages

One example of a pre-molded lead frame includes a mold body, a plurality of recesses, and a plurality of first leads. The mold body includes a first main surface and a second main surface opposite to the first main surface. Each recess of the plurality of recesses extends from the first main surface into the mold body. The plurality of first leads are coupled to the mold body and extend from a third surface of the mold body. The third surface extends between the first main surface and the second main surface.

PACKAGE STRUCTURE

A package structure includes a semiconductor device and an adhesive pattern. The adhesive pattern surrounds the semiconductor device, wherein an angle θ is formed between a sidewall of the semiconductor device and a sidewall of the adhesive pattern, 0°<θ<90° wherein the adhesive layer has a first opening misaligned with a corner of the semiconductor device closest to the first opening.

PACKAGE STRUCTURE

A package structure includes a semiconductor device and an adhesive pattern. The adhesive pattern surrounds the semiconductor device, wherein an angle θ is formed between a sidewall of the semiconductor device and a sidewall of the adhesive pattern, 0°<θ<90° wherein the adhesive layer has a first opening misaligned with a corner of the semiconductor device closest to the first opening.

PACKAGE SUBSTRATE
20230217593 · 2023-07-06 ·

A package substrate according to an embodiment includes an insulating layer; a first outer circuit pattern disposed on an upper surface of the insulating layer; a second outer circuit pattern disposed under a lower surface of the insulating layer; a first connection portion disposed on an upper surface of a first-first circuit pattern of the first outer circuit pattern; a first contact portion disposed on the first connection portion; a first device disposed on the first connection portion through the first contact portion; a second contact portion disposed under a lower surface of a second-first circuit pattern of the second outer circuit pattern; a second device attached to the second-first circuit pattern through the second contact portion; and a second connection portion disposed under a lower surface of a second-second circuit pattern of the second outer circuit pattern; wherein the first connection portion is disposed with a first width and a first interval, and wherein the second connection portion is disposed with a second width greater than the first width and a second interval greater than the first interval.

Substrate with embedded active thermoelectric cooler

The present disclosure relates to a substrate that includes a substrate body and a thermoelectric cooler embedded in the substrate body. The thermoelectric cooler includes a top-side plate with an element-contact pad and a bottom-side plate. The element-contact pad is on a top surface of the top-side plate, which faces a same direction as a top surface of the substrate body and is exposed to the external space of the substrate body. The bottom-side plate is below the top-side plate and close to a bottom surface of the top-side plate. Herein, the element-contact pad is configured to accommodate attachment of a heat-generating electrical element. The top-side plate is configured to change temperature of the heat-generating electrical element, and the bottom-side plate is configured to transfer heat to or absorb heat from the bottom surface of the substrate body.

Substrate with embedded active thermoelectric cooler

The present disclosure relates to a substrate that includes a substrate body and a thermoelectric cooler embedded in the substrate body. The thermoelectric cooler includes a top-side plate with an element-contact pad and a bottom-side plate. The element-contact pad is on a top surface of the top-side plate, which faces a same direction as a top surface of the substrate body and is exposed to the external space of the substrate body. The bottom-side plate is below the top-side plate and close to a bottom surface of the top-side plate. Herein, the element-contact pad is configured to accommodate attachment of a heat-generating electrical element. The top-side plate is configured to change temperature of the heat-generating electrical element, and the bottom-side plate is configured to transfer heat to or absorb heat from the bottom surface of the substrate body.

Package
11551984 · 2023-01-10 · ·

A package has a package body formed by stacked insulating layers and having a front surface including a mounting area, a back surface and a side surface; a plurality of hollow portions arranged so as to be adjacent to each other on the front surface of the package body; a plurality of electrode pads individually placed on respective bottom surfaces of the hollow portions; and a partition wall formed by at least one insulating layer that forms the package body and having protruding banks at its both edge sides. Surfaces of the electrode pads are located at a lower position with respect to the front surface of the package body. The hollow portions are arranged at opposite sides of the partition wall. The electrode pads are electrically connected to respective conductor layers that are formed on the back surface and/or the side surface of the package body.

Module with power device

The present disclosure provides a module including a circuit board, a first component and a second component. The circuit board includes a first side and a second side opposite to each other and includes a first plane and second plane disposed on the first side. A first height difference is formed between the first plane and the second plane. The first component and the second component are disposed on the first plane and the second plane, respectively. The first component and the second component include a first contact surface and a second contact surface, respectively. The first contact surface and the second contact surface are coplanar with a first surface of the module. It benefits to reduce the design complexity of a heat-transfer component, and enhance the heat dissipation capability and the overall power density of the module simultaneously.

Shape memory polymer for use in semiconductor device fabrication

A method for forming a semiconductor structure includes curing a shape memory polymer in a first shape. The shape memory polymer is coupled to a conductive layer. The method further includes folding the shape memory polymer from the first shape into a second shape. The method also includes bonding a semiconductor wafer to the conductive layer while the shape memory polymer is in the second shape. The semiconductor wafer has first and second dies. The semiconductor wafer is then singulated to separate the first die from the second die. The method further includes expanding the shape memory polymer to its first shape and singulating the shape memory polymer to separate the first and second dies.