The invention relates to an electronic module (30) intended to be held in place on a carrier (1) by a holding means (4), the electronic module (30) consisting of a plurality of layers, comprising a first carrier layer (10) carrying one or more contacts (11), a first face (10b) of the carrier layer (10) is in contact with a first face (12a; 53a) of a substrate (12; 53) and comprising a face of the substrate (12b; 53b) carrying one or more antennas (13; 50, 51), the antenna(s) (13; 50, 51) being connected to an integrated circuit (14) via feeder links (15). The electronic module (30) comprises at least one stay-in-place safety layer (31) arranged between the first carrier layer (10) and the substrate (12), the safety layer (31) being an adhesive layer, the safety layer (31) having technical features such that the binding forces Fad1 of the layer are lower than the binding forces Fad2 of the holding means (4) so as to cause the rupture of the feeder links (15) by the action of a tensile force exerted on the electronic module.

A method for producing a plurality of chips each comprising an individualisation region, each chip comprising at least: a first and a second level of the electrical tracks, and an interconnections level comprising vias. The method includes producing on the dielectric layer covering the first level a mask having openings located in line with the electrical tracks and making the dielectric layer accessible. The method includes producing, in a region of the chip comprising the individualisation region, patterns conformed so that: first openings of the hard mask are not masked by the patterns, and second openings of the hard mask are masked by the patterns. The method includes producing via openings in the dielectric layer in line solely with the first openings. The method further includes filling in the via openings with an electrically conductive material, and producing the second level of the electrical tracks on the vias.

An integrated circuit includes a substrate, an interconnection part, and an isolating region located between the substrate and the interconnection part. A decoy structure is located within the isolating region and includes a silicided sector which is electrically isolated from the substrate.

An integrated circuit device is disclosed, the device comprising a protective layer and a protected circuit on a substrate, the protective layer being configured to protect the protected circuit by absorbing laser radiation targeted at the protected circuit through the substrate. The device may be configured such that removal of the protective layer causes physical damage that disables the protected circuit. The device may comprise intermediate circuitry protruding into the substrate between the protective layer and the protected circuit, wherein the physical damage that disables the protected circuit is physical damage to the intermediate circuitry. The device may comprise detection circuitry configured to detect a change in an electrical property of the device indicative of removal of the protective layer, and, in response to detecting the change in the electrical property, cause the protected circuit to be disabled.

An organic light emitting display device including a dam structure disposed in a non-display area of a substrate and an alignment mark disposed outside the dam structure. The alignment mark is not covered by, and does not overlap with, the dam structure, because the alignment mark is disposed outside the dame structure. Thus, a scribing process may be performed smoothly.

A physically unclonable function (PUF) device includes capacitor array couple to an electronic device. The capacitor array includes a plurality of parallel conductive elements coupled to a dielectric material having a spatially varying permittivity to define array of randomly valued capacitors.

A method of making a semiconductor device includes operations directed toward electrically connecting a component to a first fuse, wherein the first fuse is on a first conductive level a first distance from the component; identifying a conductive element for omission between the first fuse and a second fuse; and electrically connecting the component to the second fuse, wherein the second fuse is on a second conductive level a second distance from the component, the second distance is greater than the first distance, and the electrically connecting the component to the second fuse comprises electrically connecting the component to the second fuse without forming the identified conductive element.

The present disclosure relates to semiconductor structures and, more particularly, to a backside structure for optical attack mitigation and methods of manufacture. The structure includes: at least one device on a front side of a semiconductor substrate; and a plurality of grating layers under the at least one device. The plurality of grating layers includes at least a first material having a first refractive index alternating with a second material having a second refractive index.

The present disclosure relates to semiconductor structures and, more particularly, to a photonic chip security structure and methods of manufacture. The structure includes an optical component over a substrate material, and at least one vertical wall including a reflecting material within a dielectric stack of material and surrounding the optical component.

A method for securing and verifying semiconductor wafers during fabrication includes receiving a semiconductor wafer after a layer of features has been patterned thereon. At least one security mark is formed at one or more locations embedded within a backside of the semiconductor wafer by implanting an inert species at the one or more locations. At a subsequent point in fabrication and/or after fabrication of the semiconductor wafer has completed the backside of the wafer is inspected for detection of the at least one security mark. If the at least one security mark is not detected at an expected location within the backside of the semiconductor wafer a determination is made that the semiconductor wafer has been compromised.