Patent classifications
H01L24/26
Display Device
In order to achieve the above-described objects, according to an aspect of the present disclosure, a display device includes a substrate which includes an active area and a non-active area extending from the active area and including a pad area and is formed of any one of a transparent conducting oxide and an oxide semiconductor; a plurality of inorganic insulating layers disposed on the substrate; a dam member having one end disposed on the pad area and the other end disposed at the outside of the substrate; and a plurality of flexible films which is disposed to cover the dam member and has one end disposed in the pad area. Accordingly, the dam member which covers the pad area is formed to minimize the crack of the plurality of inorganic insulating layers at the edge of the substrate.
DOUBLE-SIDE COOLING-TYPE SEMICONDUCTOR DEVICE
A double-side cooling-type semiconductor device includes a first circuit board and a second circuit board, a semiconductor element bonded to a control electrode of the first circuit board, a first spacer disposed between the first circuit board and the semiconductor element, bonded to the first circuit board, and bonded to the semiconductor element, and a second spacer disposed between the second circuit board and the semiconductor element, bonded to the second circuit board, and bonded to the semiconductor element.
SEMICONDUCTOR PACKAGE AND A METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE
A semiconductor package including: a package substrate; a spacer chip attached on a surface of the package substrate, the spacer chip having a groove pattern in a surface of the spacer chip; at least one semiconductor chip mounted on the package substrate, the at least one semiconductor chip being attached on the surface of the spacer chip via an adhesive film; and a sealing member on the surface of the package substrate, the sealing member covering the spacer chip and the at least one semiconductor chip.
HETEROGENOUS BONDING LAYERS FOR DIRECT SEMICONDUCTOR BONDING
A first semiconductor device and a second semiconductor device may be directly bonded using heterogeneous bonding layers. A first bonding layer may be formed on the first semiconductor device and the second bonding layer may be formed on the second semiconductor device. The first bonding layer may include a higher concentration of hydroxy-containing silicon relative to the second bonding layer. The second bonding layer may include silicon with a higher concentration of nitrogen relative to the first bonding layer. An anneal may be performed to cause a dehydration reaction that results in decomposition of the hydroxy components of the first bonding layer, which forms silicon oxide bonds between the first bonding layer and the second bonding layer. The nitrogen in the second bonding layer increases the effectiveness of the dehydration reaction and the effectiveness and strength of the bond between the first bonding layer and the second bonding layer.
SYSTEMS AND METHODS FOR DIRECT BONDING IN SEMICONDUCTOR DIE MANUFACTURING
A method for bonding semiconductor dies, resulting semiconductor devices, and associated systems and methods are disclosed. In some embodiments, the method includes depositing a first material on the first semiconductor die. The first material has a first outer surface and a first chemical composition at the first outer surface. The method also includes depositing a second material on the second semiconductor die. The second material has a second outer surface and a second chemical composition at the second outer surface that is different from the first chemical composition. The method also includes stacking the dies. The second outer surface of the second semiconductor die is in contact with the first outer surface of the first semiconductor die in the stack. The method also includes reacting the first outer surface with the second outer surface. The reaction causes the first outer surface to bond to the second outer surface.
Electronic device including sensor placed under display
An electronic device includes a display and a fingerprint sensor disposed under a specified area of the display. The fingerprint sensor is bonded to an inner surface of the display, through a bonding layer, and at least a portion of the bonding layer is expanded in a second direction different from a first direction facing the specified area and forms a protrusion structure to surround at least a portion of a side surface, which faces the second direction, of the fingerprint sensor.
THERMAL CONDUCTIVE SILICONE COMPOSITION
A thermally conductive silicone composition with good workability in a pin transfer process, and with which the cured product obtained has high adhesive strength and high heat dissipation. The composition includes (A) a straight-chain organopolysiloxane having at least two silicon atom-bonded alkenyl groups per molecule; (B) an organopolysiloxane resin; (C) organohydrogenpolysiloxane; (D) a heat dissipating filler powder mixture of a first collection of heat dissipating filler powder having an average particle size of no less than 0.2 .Math.m but less than 1 .Math.m and a second collection of heat dissipating filler powder having an average particle size of no less than 2 .Math.m but less than 20 .Math.m (at a mass ratio 3:7 to 2:8); (E) silica particles having an average primary particle size of less than 1 .Math.m; and (F) a straight-chain organopolysiloxane having a silicon atom-bonded alkoxy group at one or both ends of the molecular chain.
WAFER-LEVEL BACKSIDE LAYER FOR SEMICONDUCTOR APPARATUS
In a described example, a method of forming a semiconductor apparatus includes applying a layer of an electrically insulating material on a backside of a semiconductor wafer having a plurality of integrated circuit dice. The method also includes mounting the wafer to dicing tape with a die attach film, in which the die attach film is between the backside layer and the dicing tape, and cutting the wafer into respective dice.
Semiconductor Packaging Substrate Fine Pitch Metal Bump and Reinforcement Structures
Semiconductor packaging substrates and processing sequences are described. In an embodiment, a packaging substrate includes a build-up structure, and a patterned metal contact layer partially embedded within the build-up structure and protruding from the build-up structure. The patterned metal contact layer may include an array of surface mount (SMT) metal bumps in a chip mount area, a metal dam structure or combination thereof.
ELECTRONIC COMPONENT MOUNTING PACKAGE AND ELECTRONIC DEVICE
An electronic component mounting package includes a metal substrate having a recessed portion and an insulation substrate having a mounting surface for an electronic component, in which the insulation substrate is located on a bottom surface of the recessed portion via a bonding material, and the bonding material is located within the insulation substrate when seen through an opening of the recessed portion in front perspective view.