Various teachings of the present disclosure include a method for welding an attachment piece to a semiconductor metallization using laser welding. The method may include: arranging an attachment piece having a flat side with a thin point so the flat side faces the semiconductor metallization; and welding the flat side to the semiconductor metallization. The flat side rests against a flat side of the semiconductor metallization over an entire surface area of the flat side. The thin point is formed with a cup shape of the attachment piece. The cup shape is open in the direction away from the semiconductor metallization.

A preparation method of a thin power device comprising the steps of steps S1, S2 and S3. In step S1, a substrate is provided. The substrate comprises a first set of first contact pads and a second set of second contact pads arranged at a front surface and a back surface of the substrate respectively. Each first contact pad of the first set of contact pads is electrically connected with a respective second contact pad of the second set of contact pads via a respective interconnecting structure formed inside the substrate. A through opening is formed in the substrate aligning with a third contact pad attached to the back surface of the substrate. The third contact pad is not electrically connected with the first set of contact pads. In step S2, a semiconductor chip is embedded into the through opening. A back metal layer at a back surface of the semiconductor chip is attached to the third contact pad. In step S3, a respective electrode of a plurality of electrodes at a front surface of the semiconductor chip is electrically connected with said each first contact pad of the first set of contact pads via a respective conductive structure of a plurality of conductive structures.

A semiconductor device is provided, including a seal portion; an electronic element within the seal portion; first, second, and third lead terminals; first and second connecting elements; and first and second conductive bonding agents, one end of the first connecting element having a protrusion downward and electrically connected to a control electrode of the electronic element with the first conductive bonding agent, a first side surface extending from the one end to the other end of the first connecting element is parallel to an extending direction along which the one end of the second connecting element extends, a wall portion being disposed on a top surface of the one end of the second lead terminal, and the wall portion being in contact with the other end of the first connecting element.

A semiconductor package comprises a lead frame, a first field-effect transistor (FET), a second low side FET, a first high side FET, a second high side FET, a first metal clip, a second metal clip, and a molding encapsulation. The semiconductor package further comprises an optional integrated circuit (IC) controller or an optional inductor. A method for fabricating a semiconductor package. The method comprises the steps of providing a lead frame; attaching a first low side FET, a second low side FET, a first high side FET, and a second high side FET to the lead frame; mounting a first metal clip and a second metal clip; forming a molding encapsulation; and applying a singulation process.

A method of fabricating a semiconductor device is disclosed. In one aspect, the method includes placing a first semiconductor chip on a carrier with the first main surface of the first semiconductor chip facing the carrier. A first layer of soft solder material is provided between the first main surface and the carrier. Heat is applied during placing so that a temperature at the first layer of soft solder material is equal to or higher than a melting temperature of the first layer of soft solder material. A second layer of soft solder material is provided between the first contact area and the second main surface. Heat is applied during placing so that a temperature at the second layer of soft solder material is equal to or higher than a melting temperature of the second layer of soft solder material. The first and second layers of soft solder material are cooled to solidify the soft solder materials.

Disclosed is a technique capable of preventing an encapsulating material from covering a heat-dissipating surface of a semiconductor module, which releases heat of a switching element. Specifically disclosed a step for manufacturing a semiconductor module including a submodule having a collector and an emitter with heat-dissipating surfaces, including a step for placing the submodule in the cavity so that the submodule is pressed by the pressing device while covering the heat-dissipating surface of the emitter with the pressing device and covering the heat-dissipating surface of the collector with the lower mold, and a step for feeding the encapsulating material to the cavity by moving the piston so that the pressure of the cavity measured by the pressure measuring device does not exceed the pressure at which the pressing device presses the submodule.

A method includes providing a substrate having substrate terminals and providing a first component having a first terminal and a second terminal. The method includes providing a clip structure having a first clip, a second clip, and a clip connector coupling the first clip to the second clip. The method includes coupling the first clip to the first terminal and a substrate terminal and coupling the second clip to another substrate terminal. The method includes encapsulating the structure and removing a portion of the clip connector. In some examples, the first portion of the clip connector includes a first portion surface, the second portion of the clip connector includes a second portion surface, and the first portion surface and the second portion surface are exposed from a top side of the encapsulant. Other examples and related structures are also disclosed herein.

A power device includes a semiconductor chip provided over a substrate, and a patterned lead. The patterned lead includes a raised portion located between a main portion and an end portion. At least part of the raised portion is positioned over the semiconductor chip at a larger height than both the main portion and the end portion. A bonding pad may also be included. The end portion may include a raised portion, bonded portion, and connecting portion. At least part of the bonded portion is bonded to the bonding pad and at least part of the raised portion is positioned over the bonding pad at a larger height than the bonded portion and connecting portion. The end portion may also include a plurality of similarly raised portions.

A temporary protective film for semiconductor sealing molding includes a support film and an adhesive layer provided on one surface or both surfaces of the support film and containing a resin and a silane coupling agent. The content of the silane coupling agent in the temporary protective film may be more than 5% by mass and less than or equal to 35% by mass with respect to the total mass of the resin.

A bonding structure and a method for bonding components, wherein the bonding structure includes a nanoparticle preform. In accordance with embodiments, the nanoparticle preform is placed on a substrate and a workpiece is placed on the nanoparticle preform.