Provided is a semiconductor package modularized and manufactured by preparing a main block for putting on a semiconductor chip, an insulator, and one or more sub block, preparing the semiconductor chip, preparing an adhesive used in attaching the semiconductor chip, attaching the semiconductor chip to an upper surface or upper and lower surfaces of the main block, performing an electrical connection of the semiconductor chip, preparing a substrate comprising a pattern enabling an electrical connection and vertically attaching one side of the main block to the pattern of the substrate to enable an electrical connection. In the semiconductor package above, an accumulation rate increases on the substrate due to a vertically arranged structure of the semiconductor chips and a heat emission area is enlarged to improve a heat emission effect.

A semiconductor device includes a substrate that includes a first insulating layer, a conductive layer on the first insulating layer, a second insulating layer on the conductive layer, and an opening that passes through the conductive layer and the second insulating layer and in which part of the conductive layer is exposed, a conductive material that contacts at least the first insulating layer and the part of the conductive layer in the opening, and a semiconductor chip that has an electrode extending towards the first insulating layer within the opening and contacting the conductive material.

A package substrate and method of manufacturing a package substrate and a semiconductor device package are provided. The package substrate includes a circuit layer, an optically-cured dielectric layer, a plurality of block layers and a sacrificial layer. The circuit layer includes a plurality of conductive pads. The optically-cured dielectric layer has an upper surface and a lower surface opposite to the upper surface. The optically-cured dielectric layer covers the circuit layer, and first surfaces of the conductive pads are at least partially exposed from the upper surface of the optically-cured dielectric layer. The block layers are respectively disposed on the first surfaces of the conductive pads exposed by the optically-cured dielectric layer. The sacrificial layer is disposed on the optically-cured dielectric layer and covering the block layers.

A semiconductor package includes a circuit board including a wiring structure, first and second semiconductor chips disposed on the circuit board and connected to the wiring structure, a dummy chip disposed on the circuit board and positioned between the first and second semiconductor chips, and a molded member disposed on the circuit board and surrounding the first and second semiconductor chips and the dummy chip. The dummy chip may include a rounded edge between an upper surface and a side surface.

The invention relates to a functional chip (100) of which at least two electrical connection pads (11a, 11b) are intended for being connected to wire elements (40a, 40b). Said chip comprises: —a substrate (10) comprising a microelectronic component electrically connected to the two electrical connection pads arranged on a front face of said substrate (10), —a cover (20) comprising a first portion (21) assembled to the front face of the substrate (10), said first portion (21) forming a spacer between the two electrical connection pads; the cover (20) further comprising a second portion (22) spaced apart from the front face of the substrate (10) and extending opposite each electrical connection pad only partially, so as to allow access to said pads, along an axis (z) normal to the front face of the substrate (10). The invention likewise relates to a method for manufacturing such a functional chip.

An electronic device includes a die attach pad with a set of cantilevered first leads for down bond connections, a set of second leads spaced apart from the die attach pad, a semiconductor die mounted to the die attach pad and enclosed by a package structure, a set of first bond wires connected between respective bond pads of the semiconductor die and at least some of the first leads, and a set of second bond wires connected between respective further bond pads of the semiconductor die and at least some of the second leads.

Provided is a semiconductor device capable of maintaining the flatness of a glass substrate and sufficiently protecting an end portion of the glass substrate. A semiconductor device according to one aspect of the present disclosure includes: a glass substrate including a first surface, a second surface opposite to the first surface, and a first side surface between the first surface and the second surface; wirings provided on the first and second surfaces; a first insulating film that covers the first surface; a second insulating film that covers the second surface; and a third insulating film that covers the first side surface, the third insulating film being continuous with at least one of the first and second insulating films.

A bonding wire includes a hollow member made of an insulator and mounted such as to bridge ICs formed with interconnects, such that a plurality of open ends is each closed by abutting on a surface of the interconnect that is a connection target, and a connection member made of a conductor, filling inside of the hollow member such as to bond to the surface of the interconnect at a location where the hollow member abuts on the surface of the interconnect.

A signal-heat separated TMV packaging structure includes an insulating dielectric material, an inner signal line layer arranged in the insulating dielectric material, an outer signal line layer, a heat dissipation metal face and a chip. A first side of the insulating dielectric material is provided with an isolating layer. The outer signal line layer is arranged on a surface of a second side of the insulating dielectric material and is connected with the inner signal line layer through a TMV structure. The heat dissipation metal face is arranged on a surface of the first side of the insulating dielectric material, and is separated from the inner signal line layer. The chip is embedded in the insulating dielectric material, with an active face in electrically-conductive connection with the inner signal line layer and a passive face in heat transfer connection with the heat dissipation metal face.

A semiconductor apparatus includes a semiconductor element, a control terminal electrically connected to a top electrode of the semiconductor element through a wiring member, and a case member in which at least a portion of the control terminal is embedded and which defines a space for housing the semiconductor element. The control terminal includes a pad to which the wiring member is connected. The case member includes a wiring member positioning part raised on the case member as a reference point for a positioning of the wiring member before a connection is made of the wiring member to the pad.