Provided is a method for manufacturing a semiconductor device which connects a first bond point and a second bond point by a wire. The method includes: a ball bonding step in which a crimping ball and a ball neck are formed at the first bond point by ball bonding; a thin-walled portion forming step in which a thin-walled portion having a reduced cross-sectional area is formed between the ball neck and the crimping ball; a wire tail separating step in which after a capillary is raised to unroll a wire tail, the capillary is moved in a direction to the second bond point, and the wire tail and the crimping ball are separated in the thin-walled portion; and a wire tail joining step in which the capillary is lowered and a side surface of the separated wire tail is joined onto the crimping ball.

An ultrasonic bonding apparatus includes an ultrasonic bonding machine having an ultrasonic tool for applying an ultrasonic wave to a bonding target member mounted on a fixed object fixed to a jig, while pressing a bonding member against the bonding target member; and a bonding inspection apparatus for inspecting a bonding quality of the bonding target member and the bonding member. The bonding inspection apparatus includes: a bonded-state measuring device for detecting a vibration in the jig or a housing of the ultrasonic bonding machine equipped with the jig, to thereby output a detection signal; and a bonded-state determination device for determining, in a bonding process for the bonding target member and the bonding member, a bonded state between the bonding target member and the bonding member on the basis of the detection signal outputted by the bonded-state measuring device.

A stacked transistor arrangement and process of manufacture thereof are provided. Switched electrodes of first and second transistor chips are accessible on opposite sides of the first and second transistor chips. The first and second transistor chips are stacked one on top of the other. Switched electrodes of adjacent sides of the transistor chips are coupled together by a conductive layer positioned between the first and second transistor chips. Switched electrodes on sides of the first transistor chip and the second transistor chip that are opposite the adjacent sides are coupled to a lead frame by bond wires or solder bumps.

A semiconductor device, including a substrate having an insulating plate and a conductive plate formed on the insulating plate, a semiconductor chip formed on the conductive plate, a contact part arranged on the conductive plate with a bonding member therebetween, a rod-shaped external connection terminal having a lower end portion thereof fitted into the contact part, and a lid plate having a front surface and a back surface facing the substrate. An insertion hole pierces the lid plate, forming an entrance and exit respectively on the back and front surfaces of the lid plate. The external connection terminal is inserted in the insertion hole. The semiconductor device has at least one of a guide portion with an inclined surface, fixed to a portion of the external connection terminal located in the insertion hole, or an inclined inner wall of the insertion hole.

Provided is a method of manufacturing a semiconductor having a double-sided substrate including preparing a first substrate on which a specific pattern is formed to enable electrical connection, preparing at least one semiconductor chip bonded to a metal post, bonding the at least one semiconductor chip to the first substrate, bonding a second substrate to the metal post, forming a package housing by packaging the first substrate and the second substrate to expose a lead frame, and forming terminal leads toward the outside of the package housing. Accordingly, the semiconductor chip and the metal post are previously joined to each other and are respectively bonded to the first substrate and the second substrate so that damage generated while bonding the semiconductor chip may be minimized and electrical properties and reliability of the semiconductor chip may be improved.

A method for preparing a semiconductor device includes providing an integrated circuit die having a bond pad. The bond pad includes aluminum (Al). The method also includes etching a top portion of the bond pad to form a recess, and bonding a wire bond to the recess in the bond pad. The wire bond includes copper (Cu).

A power semiconductor chip having: a semiconductor component body; a multilayer metallization arranged on the semiconductor component body; and a nickel layer arranged over the semiconductor component body. The invention further relates to a method for producing a power semiconductor chip and to a power semiconductor device. The invention provides a power semiconductor chip which has a metallization to which a copper wire, provided without a thick metallic coating, can be reliably bonded without damage to the power semiconductor chip during bonding.

A semiconductor package may include: a base layer; first to Nth semiconductor chips (N is a natural number of 2 or more) sequentially offset stacked over the base layer so that a chip pad portion of one side edge region is exposed, wherein the chip pad portion includes a chip pad and includes a redistribution pad that partially contacts the chip pad and extends away from the chip pad; and a bonding wire connecting the chip pad of a kth semiconductor chip among the first to Nth semiconductor chips to the redistribution pad of a k−1th semiconductor chip or a k+1th semiconductor chip when k is a natural number greater than 1 and the bonding wire connecting the chip pad of the kth semiconductor chip to a pad of the base layer or the redistribution pad of the k−1th semiconductor chip when k is 1.

A wire bonding device for performing a wire bonding process includes: a bonding tool for inserting a wire; an ultrasonic vibrator; a drive mechanism for moving the bonding tool; and a control part. The control part performs: a bonding step of bonding the wire to a bonding point; a tail feeding out step of feeding out a wire tail from the wire bonded to the bonding point; a tension applying step of raising the bonding tool to apply tension to the wire while the wire is clamped; a tension release step of lowering the bonding tool to release the tension applied to the wire; and after performing a series of steps including the tension applying step and the tension release step at least once, a tail cutting step of raising the bonding tool to cut the wire tail from the wire.

A semiconductor device includes a substrate that includes an upper protection layer and a plurality of upper bonding pads, a semiconductor chip on the substrate, and a plurality of bonding wires connected to the semiconductor chip and the upper bonding pads. Each of the upper bonding pads includes a first conductive pattern, a second conductive pattern that covers a top surface and a sidewall of the first conductive pattern and includes a metal element the same as a metal element of the first conductive pattern, and a bonding layer on the second conductive pattern. A width at the top surface of the first conductive pattern is less than a width at a bottom surface of the first conductive pattern. The upper protection layer covers sidewalls of the second conductive pattern.