A bonding apparatus includes: an anisotropic conductive film (ACF) attachment unit which attaches a first ACF and a second ACF onto a display panel assembly; a compression unit which compresses a first chip-on-film (COF) on the first ACF and compresses a second COF on the second ACF;

and a buffer unit which rotates the display panel assembly, on which the first ACF and the second COF are compressed, on a plane.

A method to produce a substrate suitable for diffusion bonding is described. A flexible dielectric substrate is provided. An alkaline modification is applied to the dielectric substrate to form a polyamic acid (PAA) anchoring layer on a surface of the dielectric substrate. A NiP seed layer is electrolessly plated on the PAA layer. Copper traces are plated within a photoresist pattern on the NiP seed layer. A surface finishing layer is electrolytically plated on the copper traces. The photoresist pattern and NiP seed layer not covered by the copper traces are removed to complete the substrate suitable for diffusion bonding.

A method of directly transferring a first semiconductor device die to a substrate includes loading a wafer tape into a first frame, loading a substrate into a second frame, arranging at least one of the first frame or the second frame such that a surface of the substrate is adjacent to a first side of the wafer tape, and orienting a needle to a position adjacent to a second side of the wafer tape, the needle extending in a direction toward the wafer tape. The method also includes activating a needle actuator connected to the needle to move the needle to a die transfer position at which the needle contacts the second side of the wafer tape to press the first semiconductor device die into contact with the second semiconductor device die.

The present invention discloses a liquid crystal panel, includes a color filter substrate, an array substrate, a liquid crystal disposed between the color filter substrate and the array substrate, a chip on film, a driver chip and a circuit board disposed on the chip on film, one end of the chip on film is bonded to an end face of the array substrate and is electrically connected with a metal line array in the array substrate, the other end of the chip on film is bound with the circuit board. The invention also discloses a method for fabricating a liquid crystal panel and a display apparatus. When applying signal to the liquid crystal panel, the chip on film is bonded to the end face of the array substrate to realize the conduction of the metal line array avoiding the longer bonding region extended from a side of the TFT substrate.

A pressing ram having an elastic cushion element and intended for the material-bonded press-sintering connection of a first connection partner to a second connection partner of a power-electronics component. The elastic cushion element of the pressing ram is enclosed by a dimensionally stable frame, within which the cushion element and a guide part of the pressing ram are guided for linear movement such that the dimensionally stable frame lowers onto the first connection partner, or a workpiece carrier with the first connection partner arranged therein, and, following abutment against the same, the pressing ram together with the elastic cushion element is lowered onto the second connection partner and the elastic cushion exerts a pressure necessary for connecting the first connection partner to the second connection partner.

A method of improving electrical interconnections between two electrical elements is made available by providing a meta-material overlay in conjunction with the electrical interconnection. The meta-material overlay is designed to make the electrical signal propagating via the electrical interconnection to act as though the permittivity and permeability of the dielectric medium within which the electrical interconnection is formed are different than the real component permittivity and permeability of the dielectric medium surrounding the electrical interconnection. In some instances the permittivity and permeability resulting from the meta-material cause the signal to propagate as if the permittivity and permeability have negative values. Accordingly the method provides for electrical interconnections possessing enhanced control and stability of impedance, reduced noise, and reduced loss. Alternative embodiments of the meta-material overlay provide, the enhancements for conventional discrete wire bonds whilst also facilitating single integrated designs compatible with tape implementation.

A mask-integrated surface protective tape with a release liner, containing: a base film, a temporary-adhesive layer, a release film, a mask material layer, and a release liner, in this order, wherein the release film and the release liner each have one release-treated surface, and the release-treated surfaces of the release film and the release liner each are in contact with the mask material layer, and wherein the peeling strength between the release liner and the mask material layer is smaller than the peeling strength between the release film and the mask material layer.

A method to produce a substrate suitable for diffusion bonding is described. A flexible dielectric substrate is provided. An alkaline modification is applied to the dielectric substrate to form a polyamic acid (PAA) anchoring layer on a surface of the dielectric substrate. A NiP seed layer is electrolessly plated on the PAA layer. Copper traces are plated within a photoresist pattern on the NiP seed layer. A surface finishing layer is electrolytically plated on the copper traces. The photoresist pattern and NiP seed layer not covered by the copper traces are removed to complete the substrate suitable for diffusion bonding.

An apparatus including components to stack semiconductor device die.

A method including coupling a device substrate to a carrier substrate; aligning a portion of the device substrate to a host substrate; separating the portion of the device substrate from the carrier substrate; and after separating the portion of the device substrate, coupling the portion of the device substrate to the host substrate. A method including coupling a device substrate to a carrier substrate with an adhesive between a device side of the device substrate and the carrier substrate; after coupling the device substrate to the carrier substrate, thinning the device substrate; aligning a portion of the thinned device substrate to a host substrate; separating the portion of the device substrate from the carrier substrate; and coupling the separated portion of the device substrate to the host substrate. An apparatus including a substrate including a submicron thickness and a device layer coupled to a host substrate in a stacked arrangement.