Provided are a film-like adhesive that can prevent the back surface of a semiconductor chip, the front surface of a substrate, or the front surface of a heat sink from being partially fractured by a filler; and a method for producing a semiconductor package using the film-like adhesive.

The film-like adhesive includes an epoxy resin (A), an epoxy resin curing agent (B), a phenoxy resin (C), and a heat-conductive filler material (D), in which the heat-conductive filler (D) has an average particle size of 0.1 to 10.0 m, a compression ratio at break in a microcompression test of 5 to 50% of the average particle size of the sample, a fracture strength in a microcompression test of 0.01 to 2.0 GPa, and a thermal conductivity of 30 W/m.Math.K or higher, the content of component (D) is 10 to 70 vol % with respect to the total amount of the components (A) to (D), and the thermal conductivity after thermal curing is 1.0 W/m.Math.K or higher.

A method of improving electrical interconnections between two electrical elements is made available by providing a meta-material overlay in conjunction with the electrical interconnection. The meta-material overlay is designed to make the electrical signal propagating via the electrical interconnection to act as though the permittivity and permeability of the dielectric medium within which the electrical interconnection is formed are different than the real component permittivity and permeability of the dielectric medium surrounding the electrical interconnection. In some instances the permittivity and permeability resulting from the meta-material cause the signal to propagate as if the permittivity and permeability have negative values. Accordingly the method provides for electrical interconnections possessing enhanced control and stability of impedance, reduced noise, and reduced loss. Alternative embodiments of the meta-material overlay provide, the enhancements for conventional discrete wire bonds whilst also facilitating single integrated designs compatible with tape implementation.

Flexible interconnects, flexible integrated circuit systems and devices, and methods of making and using flexible integrated circuitry are presented herein. A flexible integrated circuit system is disclosed which includes first and second discrete devices that are electrically connected by a discrete flexible interconnect. The first discrete devices includes a first flexible multi-layer integrated circuit (IC) package with a first electrical connection pad on an outer surface thereof. The second discrete device includes a second flexible multi-layer integrated circuit (IC) package with a second electrical connection pad on an outer surface thereof. The discrete flexible interconnect is attached to and electrically connects the first electrical connection pad of the first discrete device to the second electrical connection pad of the second discrete device.

In general aspect, a semiconductor device package can include a substrate and a semiconductor die disposed on and coupled with the substrate. The semiconductor device package can further include a leadframe having an indentation defined therein, at least a portion of the indentation being disposed on and coupled with the semiconductor die via a conductive adhesive.

A power electronics method and assembly produced by the method. The assembly has a substrate, having a power semiconductor element, and an adhesion layer disposed therebetween, wherein the substrate has a first surface that faces a power semiconductor element, a power semiconductor element has a third surface that faces the substrate, the adhesion layer has a second surface which, preferably across the full area, contacts the third surface and has a first consistent surface contour having a first roughness, and wherein a fourth surface of the power semiconductor element that is opposite the third surface has a second surface contour having a second roughness, said second surface contour following the first surface contour.

A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.

An image pickup apparatus includes an image pickup device including a wiring that connects a first electrode on a light receiving surface and a second electrode on a rear surface, a first wiring board including a distal end surface, from which a flying lead protrudes, arranged to oppose the rear surface of the image pickup device, and a second wiring board including a second main surface to which an upper surface of the first wiring board is made to adhere and including a distal end surface arranged to oppose the rear surface, in which the flying lead is bent and is bonded to the second electrode, and a sealing member that seals a bonding section between the second electrode and the flying lead and an adhesion member that makes the distal end surface of the second wiring board and the rear surface adhere to each other are composed of integral curable resin.

A switching device has a substrate and a power semiconductor component, comprising a connection device and a pressure device wherein the substrate has tracks electrically insulated from one another. The power semiconductor component is on one of the tracks with a first main surface and is conductively connected thereto. The device is embodied as a film composite having a conductive film and an insulating film that forms a first and a second main surface. The switching device is connected internally in a circuit-conforming manner by the connection device and a contact area of the connection device is connected to a first contact area of one of the tracks in a force-locking and electrically conductive manner. There is a pressure body projecting to the substrate and pressing onto a first section of the second main surface of the film composite.

A method may include providing a chip carrier having a chip supporting region to support a chip, and a chip contacting region having at least one contact pad, the chip carrier being thinner in the chip contacting region such that a first thickness of the chip carrier at the at least one contact pad is smaller than a second thickness of the chip carrier in the chip supporting region. A disposing of the chip, having at least one contact protrusion, over the chip carrier, such that the at least one contact protrusion is arranged over the at least one contact pad may be included. In addition, a pressing of the chip against the chip carrier such that the at least one contact protrusion extends at least partially into the chip contacting region and is electrically contacted to the at least one contact pad may be included.

A packaged RF device is provided that utilizes flexible circuit leads. The RF device includes at least one integrated circuit (IC) die configured to implement the RF device. The IC die is contained inside a package. In accordance with the embodiments described herein, a flexible circuit is implemented as a lead. Specifically, the flexible circuit lead is coupled to the at least one IC die inside the package and extends to outside the package, the flexible circuit lead thus providing an electrical connection to the at least one IC die inside the package.