Patent classifications
H01L24/95
IC CHIP MOUNTING DEVICE, AND IC CHIP MOUNTING METHOD
The present invention is an IC chip mounting apparatus including: a conveyor configured to convey an antenna continuous body on a conveying surface, the antenna continuous body having a base material and plural inlay antennas continuously formed on the base material; an ejection unit configured to eject a thermosetting adhesive toward a reference position of each antenna in the antenna continuous body; an IC chip placement unit configured to place an IC chip on the adhesive that is located on the reference position of each antenna in the antenna continuous body; a first light irradiator configured to irradiate the adhesive of each antenna with a first light, in the vicinity of a position where an IC chip is located on the conveying surface; and a second light irradiator configured to irradiate the adhesive of each antenna with a second light, at a position downstream from a position where the adhesive is irradiated with the first light.
DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
A display device includes a substrate, a light emitting element on the substrate, and including a first end portion and a second end portion that are aligned in a first direction that is substantially parallel to an upper surface of the substrate, a first contact electrode in contact with the first end portion of the light emitting element, a first electrode on the first contact electrode, and electrically connected to the first end portion of the light emitting element through the first contact electrode, and a second electrode electrically connected to the second end portion of the light emitting element.
SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
Provided is a semiconductor package, including a lower semiconductor chip, a plurality of semiconductor chips that are disposed on the lower semiconductor chip in a first direction perpendicular to a top surface of the lower semiconductor chip, a plurality of nonconductive layers disposed between the plurality of semiconductor chips, a nonconductive pattern that extends from the nonconductive layers and is disposed on lateral surfaces of at least one of the plurality of semiconductor chips, a first mold layer disposed a top surface of the nonconductive pattern, and a second mold layer disposed a lateral surface of the nonconductive pattern and a lateral surface of the first mold layer, wherein the nonconductive pattern and the first mold layer are disposed between the second mold layer and lateral surfaces of the plurality of semiconductor chips.
PACKAGE STRUCTURE WITH REINFORCED ELEMENT
A package structure is provided. The package structure includes a reinforced plate and multiple conductive structures penetrating through the reinforced plate. The package structure also includes a redistribution structure over the reinforced plate. The redistribution structure has multiple polymer-containing layers and multiple conductive features. The package structure further includes multiple chip structures bonded to the redistribution structure through multiple solder bumps. In addition, the package structure includes a protective layer surrounding the chip structures.
ELECTRONIC PACKAGE AND METHOD FOR MANUFACTURING THE SAME
An electronic package and a method for manufacturing is provided, having first and opposing second surfaces, and a circuit thereon, each of the first and second surfaces has a terminal connected to the circuit; a conductive element spaced apart from the die with top and a bottom surfaces; a body of molding compound encapsulating the die and the element, the body having a top side facing the first surface and a bottom side facing the second surface; a first package terminal at the top side connected to the terminal at the first surface, and a second package terminal at the top side connected to the top surface of the conductive element, the conductive element is formed from the first package terminal and the second package terminal; and a conductive layer connecting the bottom surface of the conductive element to the terminal arranged on the second surface of the die.
Method of manufacturing semiconductor package structure
Methods of manufacturing a semiconductor package structure are provided. A method includes: bonding dies and dummy dies to a wafer; forming a dielectric material layer on the wafer to cover the dies and the dummy dies; performing a first planarization process to remove a first portion of the dielectric material layer over top surfaces of the dies and the dummy dies; and performing a second planarization process to remove portions of the dies, portions of the dummy dies and a second portion of the dielectric material layer, and a dielectric layer is formed laterally aside the dies and the dummy dies; wherein after the second planarization process is performed, a total thickness variation of the dies is less than a total thickness variation of the dummy dies.
Antenna package structure and antenna packaging method
The present disclosure provides an antenna package structure and an antenna packaging method. The package structure includes an antenna circuit chip, a first packaging layer, a first rewiring layer, an antenna structure, a second metal connecting column, a third packaging layer, a second antenna metal layer, and a second metal bump. The antenna circuit chip, the antenna structure, and the second antenna metal layer are interconnected by using the rewiring layer and the metal connecting column.
Semiconductor package and method of forming the same
A method of forming a semiconductor device includes applying an adhesive material in a first region of an upper surface of a substrate, where applying the adhesive material includes: applying a first adhesive material at first locations of the first region; and applying a second adhesive material at second locations of the first region, the second adhesive material having a different material composition from the first adhesive material. The method further includes attaching a ring to the upper surface of the substrate using the adhesive material applied on the upper surface of the substrate, where the adhesive material is between the ring and the substrate after the ring is attached.
Wound body of sheet for sintering bonding with base material
To provide a wound body of a sheet for sintering bonding with a base material that realizes a satisfactory operational efficiency in a process of producing a semiconductor device comprising sintering bonding portions of semiconductor chips and that also has both a satisfactory storage stability and a high storage efficiency. A wound body 1 according to the present invention has a form in which a sheet for sintering bonding with a base material X is wound around a winding core 2 into a roll shape, the sheet for sintering bonding with a base material X having a laminated structure comprising: a base material 11; and a sheet for sintering bonding 10, comprising an electrically conductive metal containing sinterable particle and a binder component.
Display device and manufacturing method thereof
A display device is provided in an embodiment in the disclosure, including a subpixel region, a spacer, a light-emitting element, and a driving circuit. The spacer separates the subpixel region into a first region and a second region. The light-emitting element is located in at least one of the first region or the second region. The driving circuit is electrically connected to the first region and the second region, so as to drive the light-emitting element. A manufacturing method of the display device is also disclosed.