Patent classifications
H01L25/04
RADIO-FREQUENCY MODULE AND COMMUNICATION DEVICE
In a radio-frequency module, a conductive layer covers a major surface opposite to the mounting board side of a resin layer and a major surface opposite to the mounting board side of an electronic component. The electronic component includes an electronic component body and a plurality of outer electrodes. The electronic component body includes an electrical insulating portion and a conductive portion provided inside the electrical insulating portion, forming at least a portion of a circuit element of the electronic component. The electronic component body has a third major surface and a fourth major surface opposite to each other, and an outer side surface. The third major surface forms the major surface of the electronic component, and the third major surface is in contact with the conductive layer. The plurality of outer electrodes are provided on the fourth major surface, but are not extended over the third major surface.
AUTONOMOUS ELECTRICAL POWER SOURCES
A unique, environmentally-friendly micron scale autonomous electrical power source is provided for generating renewable energy, or a renewable energy supplement, in electronic systems, electronic devices and electronic system components. The autonomous electrical power source includes a first conductor with a facing surface conditioned to have a low work function, a second conductor with a facing surface having a comparatively higher work function, and a dielectric layer of not more than 200 Angstroms in thickness sandwiched between the respective facing surfaces of the first conductor and the second conductor. The autonomous electrical power source is configured to harvest minimal thermal energy from any source in an environment above absolute zero. An autonomous electrical power source component is also provided that includes a plurality of autonomous electrical power source constituent elements electrically connected to one another to increase a power output of the autonomous electrical power source.
WAFER AND METHOD OF MAKING, AND SEMICONDUCTOR DEVICE
The present disclosure relates to a wafer, a manufacturing method thereof, and a semiconductor device. The wafer manufacturing method includes: providing a wafer having a scribe lane for die cutting. A plurality of through-silicon-vias for cracking stress release and prevention is formed on one side of the scribe lane, and the through-silicon-vias are filled with a protective material. Through the technique of through-silicon vias filled with protective materials on both sides of the scribe lane, the cutting stress can prevent damage to the die area during wafer cutting. The through-silicon-vias can effectively reduce the scribe lane width, which is conducive to miniaturizing the scribe lane and improving the effective utilization of wafers.
Manufacturing method of display apparatus
A display apparatus includes at least one substrate with several penetration holes, several displaying units and several switch devices disposed at different sides of the at least one substrate, and at least one bonding material filling up the penetration holes, wherein the displaying units and the switch devices are connected to each other through the at least one bonding material.
ELECTRONIC COMPONENT MODULE AND METHOD FOR MANUFACTURING ELECTRONIC COMPONENT MODULE
An electronic component module includes a plurality of components having terminals and arranged along a plane, a sealing resin portion that covers and seals these components and has a plane as one plane of an outer surface, and a shield layer that covers the outer surface of the sealing resin portion. Terminals of the plurality of components are exposed in a state of protruding from the plane of the sealing resin portion, and the terminals of these components protruding from the plane of the sealing resin portion are used as mounting terminals of the electronic component module.
Integrated photobiomodulation device
Embodiments of the disclosed subject matter may provide a display device or display surface including at least one emissive layer and a near-infrared (NIR) emissive layer disposed in a stack arrangement between a first electrode and a second electrode, where NIR light is emitted from the NIR emissive layer through the at least one emissive layer, or visible light is emitted from the at least one emissive layer through the NIR emissive layer, and where the NIR light output by the NIR emissive layer has a peak wavelength of 740 nm-1000 nm. Embodiments of the disclosed subject matter may provide a near infrared (NIR) light source disposed behind or in front of an active-matrix organic light emitting diode (AMOLED), where the NIR light source has an area greater than 25% of an active area of the display device or display surface.
Multiplexer
A multiplexer circuit includes first and second fins each extending in an X-axis direction. First, second, third and fourth gates extend in a Y-axis direction perpendicular to the X-axis direction and contact the first and second fins. The first, second, third and fourth gates are configured to receive first, second, third and fourth data signals, respectively. Fifth, sixth, seventh and eighth gates extend in the Y-axis direction and contact the first and second fins, the fifth, sixth, seventh and eighth gates, and are configured to receive the first, second, third and fourth select signals, respectively. An input logic circuit is configured to provide an output at an intermediate node. A ninth gate extends in the Y-axis direction and contacts the first and second fins. An output logic circuit is configured to provide a selected one of the first, second, third and fourth data signals at an output terminal.
Electronic device and fabrication method thereof
An electronic device and a fabrication method thereof are provided. The electronic device includes a circuit structure layer, a package structure, an electronic element, and a plurality of function elements. The circuit structure layer has a first side and a second side opposite to the first side. The package structure is disposed on the first side of the circuit structure layer. The electronic element is embedded or encapsulated in the package structure. The function elements are disposed on the second side of the circuit structure layer. The function elements are electrically connected to the electronic element through the circuit structure layer. The electronic device provided by the disclosure exhibits borderless design or has a large function region.
Semiconductor component having through-silicon vias
A semiconductor component includes a substrate having an opening. The semiconductor component further includes a first dielectric liner in the opening, wherein the first dielectric liner having a thickness T.sub.1 at a first end of the opening, and a thickness T.sub.2 at a second end of the opening, and R.sub.1 is a ratio of T.sub.1 to T.sub.2. The semiconductor component further includes a second dielectric liner over the first dielectric liner, wherein the second dielectric liner having a thickness T.sub.3 at the first end of the opening, a thickness T.sub.4 at the second end of the opening, R.sub.2 is a ratio of T.sub.3 to T.sub.4, and R.sub.1 is greater than R.sub.2.
IC die to IC die interconnect using error correcting code and data path interleaving
A multi-chip module includes a first Integrated Circuit (IC) die a second IC die. The first IC die includes an array of first bond pads, a plurality of first code group circuits, and first interleaved interconnections between the plurality of first code group circuits and the array of first bond pads, the first interleaved interconnections including a first interleaving pattern causing data from different code group circuits to be coupled to adjacent first bond pads. The second IC die includes a second array of bond pads that electrically couple to the array of first bond pads, a plurality of second code group circuits, and second interleaved interconnections between the plurality of second code group circuits and the array of second bond pads, the second interleaved interconnections including a second interleaving pattern causing data from different code groups to be coupled to adjacent second bond pads.