A resistive element includes: a semiconductor substrate; a first insulating film deposited on the semiconductor substrate; a resistive layer deposited on the first insulating film; a second insulating film deposited to cover the first insulating film and the resistive layer; a first electrode deposited on the second insulating film and electrically connected to the resistive layer; a relay wire deposited on the second insulating film without being in contact with the first electrode, and including a resistive-layer connection terminal electrically connected to the resistive layer and a substrate connection terminal connected to the semiconductor substrate with an ohmic contact; and a second electrode deposited on a bottom side of the semiconductor substrate, wherein a resistor is provided between the first electrode and the second electrode.

A device may include a lead frame, where the lead frame includes a central portion, and a side pad, the side pad being laterally disposed with respect to the central portion. The device may further include a thyristor device, the thyristor device comprising a semiconductor die and further comprising a gate, wherein the thyristor device is disposed on a first side of the lead frame on the central portion. The device may also include a positive temperature coefficient (PTC) device electrically coupled to the gate of the thyristor device, wherein the PTC device is disposed on the side pad on the first side of the lead frame; and a thermal coupler having a first end connected to the thyristor device and a second end attached to the PTC device.

A light emitting device package is provided. The light emitting device package includes three light emitting diode (LED) chips configured to emit light having different wavelengths, each of the three LED chips including a light emitting structure having a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, and an active layer interposed between the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer; a through electrode portion disposed adjacent to the three LED chips; a molding portion encapsulating respective side surfaces of the three LED chips and the through electrode portion; a transparent electrode layer disposed on a first surface of the molding portion, the three LED chips, and the through electrode portion; and three individual electrodes exposed through a second surface of the molding portion and disposed on the three LED chips, respectively.

A light emitting device package is provided. The light emitting device package includes three light emitting diode (LED) chips configured to emit light having different wavelengths, each of the three LED chips including a light emitting structure having a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, and an active layer interposed between the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer; a through electrode portion disposed adjacent to the three LED chips; a molding portion encapsulating respective side surfaces of the three LED chips and the through electrode portion; a transparent electrode layer disposed on a first surface of the molding portion, the three LED chips, and the through electrode portion; and three individual electrodes exposed through a second surface of the molding portion and disposed on the three LED chips, respectively.

A magnetic laminating structure and process includes alternating layers of a magnetic material and a multilayered insulating material, wherein the multilayered insulating material is intermediate adjacent magnetic material layers and comprises a first insulating layer abutting at least one additional insulating layer, wherein the first insulating layer and the at least one additional insulating layer comprise different dielectric materials and/or are formed by a different deposition process, and wherein the layers of the magnetic material have a cumulative thickness greater than 1 micron.

A device may include a lead frame, where the lead frame includes a central portion, and a side pad, the side pad being laterally disposed with respect to the central portion. The device may further include a thyristor device, the thyristor device comprising a semiconductor die and further comprising a gate, wherein the thyristor device is disposed on a first side of the lead frame on the central portion. The device may also include a positive temperature coefficient (PTC) device electrically coupled to the gate of the thyristor device, wherein the PTC device is disposed on the side pad on the first side of the lead frame; and a thermal coupler having a first end connected to the thyristor device and a second end attached to the PTC device.

A device may include a lead frame, where the lead frame includes a central portion, and a side pad, the side pad being laterally disposed with respect to the central portion. The device may further include a thyristor device, the thyristor device comprising a semiconductor die and further comprising a gate, wherein the thyristor device is disposed on a first side of the lead frame on the central portion. The device may also include a positive temperature coefficient (PTC) device electrically coupled to the gate of the thyristor device, wherein the PTC device is disposed on the side pad on the first side of the lead frame; and a thermal coupler having a first end connected to the thyristor device and a second end attached to the PTC device.

A magnetic laminating structure and process includes alternating layers of a magnetic material and a multilayered insulating material, wherein the multilayered insulating material is intermediate adjacent magnetic material layers and comprises a first insulating layer abutting at least one additional insulating layer, wherein the first insulating layer and the at least one additional insulating layer comprise different dielectric materials and/or are formed by a different deposition process, and wherein the layers of the magnetic material have a cumulative thickness greater than 1 micron.

A magnetic laminating structure and process includes alternating layers of a magnetic material and a multilayered insulating material, wherein the multilayered insulating material is intermediate adjacent magnetic material layers and comprises a first insulating layer abutting at least one additional insulating layer, wherein the first insulating layer and the at least one additional insulating layer comprise different dielectric materials and/or are formed by a different deposition process, and wherein the layers of the magnetic material have a cumulative thickness greater than 1 micron.