H01L29/66984

SPIN CONTROL ELECTRONIC DEVICE OPERABLE AT ROOM TEMPERATURE

A spin control electronic device operable at room temperature according to an embodiment of the present invention includes a transfer channel that includes a low-dimensional nanostructure, the nanostructure being located on a substrate, having an elongate shape in a first direction and having a cross section, cut along a second direction that is perpendicular to the first direction, in the shape of a triangle; a source electrode located on the substrate and intersecting the transfer channel, the source electrode covering part of the transfer channel; and a drain electrode spaced apart from the source electrode on the substrate, the drain electrode intersecting the transfer channel and covering part of the transfer channel.

Magnetoresistive element and spin-transport element
09825155 · 2017-11-21 · ·

The magnetoresistive element includes a semiconductor channel layer, a pinned layer disposed on the semiconductor channel layer via a first tunnel layer, a free layer disposed on the semiconductor channel layer via a second tunnel layer, wherein the semiconductor channel layer includes a first region containing an interface with the first tunnel layer, a second region containing an interface with the second tunnel layer, and a third region, impurity concentrations in the first and second regions are higher than 1×10.sup.19 cm.sup.−3, an impurity concentration in the third region is 1×10.sup.19 cm.sup.−3 or less, the first and second regions are separated by the third region, and the impurity concentrations in the first and second regions decrease in the thickness direction of the semiconductor channel layer from the interface between the semiconductor channel layer and the first tunnel layer and the interface between the semiconductor channel layer and the second tunnel layer.

MAGNETIC RANDOM ACCESS MEMORY WITH PERPENDICULAR ENHANCEMENT LAYER

The present invention is directed to an MTJ memory element including a magnetic free layer structure which includes one or more magnetic free layers that have a same variable magnetization direction substantially perpendicular to layer planes thereof; an insulating tunnel junction layer formed adjacent to the magnetic free layer structure; a magnetic reference layer structure comprising a first magnetic reference layer formed adjacent to the insulating tunnel junction layer and a second magnetic reference layer separated therefrom by a perpendicular enhancement layer with the first and second magnetic reference layers having a first fixed magnetization direction substantially perpendicular to layer planes thereof; an anti-ferromagnetic coupling layer formed adjacent to the second magnetic reference layer opposite the perpendicular enhancement layer; and a magnetic fixed layer comprising first and second magnetic fixed sublayers with the second magnetic fixed sublayer formed adjacent to the anti-ferromagnetic coupling layer opposite the second magnetic reference layer.

Emitter-coupled spin-transistor logic

A switch comprising a spin-transistor and a first control wire. The spin-transistor is configured so that when a magnetic field applied to the spin-transistor is less than a threshold value, the transistor is in a conductive state in which electric current flows through the spin-transistor. When the magnetic field applied to the spin-transistor is greater than the threshold value, the spin-transistor is in a resistive state in which the electric current flowing through the spin-transistor is substantially reduced. The first control wire is for receiving a current to affect the magnetic field applied to the spin-transistor.

METHOD FOR MAKING A QUANTUM DEVICE WITH NUCLEAR SPIN QUBITS

A method for making a quantum device including: forming, over a semiconductor layer, a graphoepitaxy guide forming a cavity with a lateral dimension that is a multiple of a period of self-assembly of a di-block copolymer into lamellas; first deposition of the copolymer in the cavity; first self-assembly of the copolymer, forming a first alternating arrangement of first lamellas and of second lamellas; removal of the first lamellas; implantation of dopants in portions of the semiconductor layer previously covered with the first lamellas; removal of the second lamellas; second deposition of the copolymer in the cavity, over a gate material; second self-assembly of the copolymer, forming a second alternating arrangement of first and second lamellas; removal of the second lamellas; etching of portions of the gate material previously covered with the second lamellas.

Memory devices based on gate controlled ferromagnestism and spin-polarized current injection

Memory devices based on gate controlled ferromagnetism and spin-polarized current injection are provided. The device structure can include a two dimensional (2D) topological insulator (TI) having an active area body. One or a pair of ferromagnetic storage units are provided on top of the 2D TI with a dielectric and a gate thereon. A first contact can be at one end of the 2D TI and a second contact can be at the other end of the 2D TI, with the one or pair of ferromagnetic storage units on the 2D TI between the two contacts to facilitate 2D TI transport along a one-dimensional edge of the first and/or second lateral side. Application of biases via the gate and the first and second contacts enable read and write operations.

Magnetoresistive element, spin MOSFET, magnetic sensor, and magnetic head
09728713 · 2017-08-08 · ·

Spin-transport elements using semiconductors have had the problem of higher element resistance than conventional GMR elements and TMR elements, making it difficult to obtain high magnetoresistance ratios. A magnetoresistive element including a semiconductor channel layer; a first ferromagnetic layer disposed on the semiconductor channel layer; a second ferromagnetic layer disposed away from the first ferromagnetic layer; and a non-magnetic first reference electrode disposed away from the first ferromagnetic layer and the second ferromagnetic layer, wherein current is input from the second ferromagnetic layer to the first ferromagnetic layer through the semiconductor channel layer, a voltage between the second ferromagnetic layer and the first reference electrode is output.

DEVICE COMPRISING ELECTROSTATIC CONTROL GATES DISTRIBUTED ON TWO OPPOSITE FACES OF A SEMICONDUCTOR PORTION

A spin qubit quantum device, comprising: a semiconductor portion comprising a first region disposed between two second regions; a first control gate disposed in direct contact with the first region and configured to control a minimum potential energy level in the first region, and disposed in direct contact with a first face of the semiconductor portion; and second electrostatic control gates, each disposed in direct contact with one of the second regions and configured to control a maximum potential energy level in one of the second regions, and disposed in direct contact with a second face, opposite to the first face, of the semiconductor portion, and wherein the first gate is not aligned with the second gates.

Finfet quantum structures utilizing quantum particle tunneling through local depleted well

Novel and useful quantum structures having a continuous well with control gates that control a local depletion region to form quantum dots. Local depleted well tunneling is used to control quantum operations to implement quantum computing circuits. Qubits are realized by modulating gate potential to control tunneling through local depleted region between two or more sections of the well. Complex structures with a higher number of qdots per continuous well and a larger number of wells are fabricated. Both planar and 3D FinFET semiconductor processes are used to build well to gate and well to well tunneling quantum structures. Combining a number of elementary quantum structure, a quantum computing machine is realized. An interface device provides an interface between classic circuitry and quantum circuitry by permitting tunneling of a single quantum particle from the classic side to the quantum side of the device. Detection interface devices detect the presence or absence of a particle destructively or nondestructively.

SKYRMION DIODE AND METHOD OF MANUFACTURING THE SAME
20170256633 · 2017-09-07 ·

The present disclosure provides a skyrmion diode using skyrmions as information carriers. The skyrmion diode includes a magnetic body and a conductive body. The magnetic body has a skyrmion which is used as information carrier. The conductive body is disposed on or under the magnetic body. The conductive body includes a Dzyaloshinskii-Moriya interaction (DMI) region and a defect region. The DMI region is provided to induce DMI in a region of the magnetic body corresponding to the DMI region by the spin-orbit coupling of the conductive body and magnetic moments of the magnetic body. The defect region is provided to prevent the DMI from being induced in a region of the magnetic body corresponding to the defect region.