H01L31/0256

Semiconductor device with electron supply layer
09786743 · 2017-10-10 · ·

A semiconductor device includes a semiconductor stacked structure including at least an electron transit layer and an electron supply layer over a substrate. The electron supply layer includes a first portion and second portions sandwiching the first portion, and the first portion has a higher energy of a conduction band than that of the second portion, and includes a doped portion doped with an n-type impurity and undoped portions that sandwich the doped portion and are not doped with an impurity.

Nitride UV light sensors on silicon substrates

An ultraviolet light sensor and method of manufacturing thereof are disclosed. The ultraviolet light sensor includes Group-III Nitride layers adjacent to a silicon wafer with one of the layers at least partially exposed such that a surface thereof can receive UV light to be detected. The Group-III Nitride layers include a p-type layer and an n-type layer, with p/n junctions therebetween forming at least one diode. Conductive contacts are arranged to conduct electrical current through the sensor as a function of ultraviolet light received at the outer Group-III Nitride layer. The Group-III Nitride layers may be formed from, e.g., GaN, InGaN, AlGaN, or InAlN. The sensor may include a buffer layer between one of the Group-III Nitride layers and the silicon wafer. By utilizing silicon as the substrate on which the UV sensor diode is formed, a UV sensor can be produced that is small, efficient, cost-effective, and compatible with other semiconductor circuits and processes. The sensor may be configured to be sensitive to a specific subtype or subband of ultraviolet radiation to be detected by selecting a specific composition of said Group-III Nitride layers.

Semiconductor device with multi-function P-type diamond gate

A semiconductor device includes a substrate, a back-barrier layer arranged on the substrate, the back-barrier layer including first p-type dopant atoms, an intermediate or nucleation layer having a lattice constant different from a lattice constant of the back-barrier layer, a semiconductor heterostructure having a channel layer, a spacer layer on the channel layer and a barrier layer on the spacer layer, wherein a combination of materials of the barrier layer, the spacer layer and the channel layer is selected such that a carrier charge is provided to the channel layer, a gate layer arranged to partially cover a top of the barrier layer, wherein the gate layer includes second p-type dopant atoms, and a set of electrodes for providing and controlling the carrier charge in the carrier channel.

OPTICAL DEVICE
20220310868 · 2022-09-29 ·

An optical device includes: a silicon substrate in which a plane direction of a crystal plane of a principal surface is a (111) plane, the principal surface having an uneven structure; and a conductor that is joined to the silicon substrate by Schottky junction, in which the conductor is directly joined to a (111) plane of at least one of a protruding portion or a depressed portion in the uneven structure.

OPTICAL DEVICE
20220310868 · 2022-09-29 ·

An optical device includes: a silicon substrate in which a plane direction of a crystal plane of a principal surface is a (111) plane, the principal surface having an uneven structure; and a conductor that is joined to the silicon substrate by Schottky junction, in which the conductor is directly joined to a (111) plane of at least one of a protruding portion or a depressed portion in the uneven structure.

SYSTEM AND METHOD BASED ON MULTI-SOURCE DEPOSITION FOR FABRICATING PEROVSKITE FILM

A system and method for fabricating a perovskite film is provided, the system including a substrate stage configured to rotate around its central axis at a rotation speed, a first set of evaporation units, each coupled to the side section or the bottom section of the chamber, a second set of evaporation units coupled to the bottom section, and a shield defining two or more zones having respective horizontal cross-sectional areas, which are open and facing the substrate, designated for the two or more evaporation units in the second set. The resultant perovskite film includes multiple unit layers, wherein each unit layer is formed by one rotation of the substrate stage, and the composition and thickness of the unit layer are controlled by adjusting at least the evaporation rates, the rotation speed and the horizontal cross-sectional areas.

High voltage monolithic LED chip

Monolithic LED chips are disclosed comprising a plurality of active regions on a submount, wherein the submount comprises integral electrically conductive interconnect elements in electrical contact with the active regions and electrically connecting at least some of the active regions in series. The submount also comprises an integral insulator element electrically insulating at least some of the interconnect elements and active regions from other elements of the submount. The active regions are mounted in close proximity to one another with at least some of the active regions having a space between adjacent ones of the active regions that is 10 percent or less of the width of one or more of the active regions. The space is substantially not visible when the LED chip is emitting, such that the LED chips emits light similar to a filament.

Semiconductor device and manufacturing method thereof
09728618 · 2017-08-08 · ·

A semiconductor device includes a first semiconductor layer formed of a nitride semiconductor on a substrate, a second semiconductor layer formed of a nitride semiconductor on the first semiconductor layer, a gate trench formed in the second semiconductor layer or in the second and first semiconductor layers, a gate electrode formed at the gate trench, and a source electrode and a drain electrode formed on the second semiconductor layer. The gate trench has terminal parts of a bottom of the gate trench formed shallower than a center part of the bottom. A part of a sidewall of the gate trench is formed of a surface including an a-plane. The center part of the bottom is a c-plane. The terminal parts of the bottom form a slope from the c-plane to the a-plane.

Layer structure for a group-III-nitride normally-off transistor
09773896 · 2017-09-26 · ·

A layer structure for a normally-off transistor has an electron-supply layer made of a group-III-nitride material, a back-barrier layer made of a group-III-nitride material, a channel layer between the electron-supply layer and the back-barrier layer, made of a group-III-nitride material having a band-gap energy that is lower than the band-gap energies of the other layer mentioned. The material of the back-barrier layer is of p-type conductivity, while the material of the electron-supply layer and the material of the channel layer are not of p-type conductivity, the band-gap energy of the electron-supply layer is smaller than the band-gap energy of the back-barrier layer. In absence of an external voltage a lower conduction-band-edge of the third group-III-nitride material in the channel layer is higher in energy than a Fermi level of the material in the channel layer.

Compound and photoelectric conversion device

Disclosed is a novel compound represented by formula (1) below. In the formula, A represents an optionally substituted aromatic hydrocarbon ring or aromatic heterocyclic group, B represents a group including a chain of one to four pieces of one or more groups selected from groups represented by specific formulae (B-1) to (B-13) (such as —C═C— or —N═N—, specifically see the description), R1 to R3 each represent an optionally substituted hydrocarbon or hydrocarbonoxy group, at least one of R1 to R3 represents an optionally substituted hydrocarbonoxy group, R4 and R5 each represent an optionally substituted hydrocarbon group, R4 and R5 may be linked together to form a ring, and R4 and R5 may be each independently linked with A to form a ring ##STR00001##