A photovoltaic device and a method of forming a contact stack of the photovoltaic device are disclosed. The photovoltaic device may include a first layer deposited on a semiconductor layer including a compound semiconductor material. The photovoltaic device may also include a dopant layer comprising tin (Sn) deposited on the first layer. The photovoltaic device may further include a conductive layer deposited or provided over the dopant layer to form a contact stack with the first layer and the dopant layer.

Embodiments of the invention provide a method of forming a group III-V material utilized in thin film transistor devices. In one embodiment, a gallium arsenide based (GaAs) layer with or without dopants formed from a solution based precursor may be utilized in thin film transistor devices. The gallium arsenide based (GaAs) layer formed from the solution based precursor may be incorporated in thin film transistor devices to improve device performance and device speed. In one embodiment, a thin film transistor structure includes a gate insulator layer disposed on a substrate, a GaAs based layer disposed over the gate insulator layer, and a source-drain metal electrode layer disposed adjacent to the GaAs based layer.

A method of forming an integrated circuit employs a plurality of layers formed on a substrate including i) bottom n-type ohmic contact layer, ii) p-type modulation doped quantum well structure (MDQWS) with a p-type charge sheet formed above the bottom n-type ohmic contact layer, iii) n-type MDQWS offset vertically above the p-type MDQWS, and iv) etch stop layer formed above the p-type MDQWS. P-type ions are implanted to define source/drain ion-implanted contact regions of a p-channel HFET which encompass the p-type MDQWS. An etch operation removes layers above the etch stop layer of iv) for the source/drain ion-implanted contact regions using an etchant that automatically stops at the etch stop layer of iv). Another etch operation removes remaining portions of the etch stop layer of iv) to form mesas that define an interface to the source/drain ion-implanted contact regions of the p-channel HFET. Source/Drain electrodes are on such mesas.

An engineered substrate comprises: a seed layer made of a first semiconductor material for growth of a solar cell; a support substrate comprising a base and a surface layer epitaxially grown on a first side of the base, the base and the surface layer made of a second semiconductor material; a direct bonding interface between the seed layer and the surface layer; wherein a doping concentration of the surface layer is higher than a predetermined value such that the electrical resistivity at the direct bonding interface is below 10 mOhm.Math.cm.sup.2, preferably below 1 mOhm.Math.cm.sup.2; and wherein a doping concentration of the base as well as the thickness of the engineered substrate are such that absorption of the engineered substrate is less than 20%, preferably less than 10%, and total area-normalized series resistance of the engineered substrate is less than 10 mOhm.Math.cm.sup.2, preferably less than 1 mOhm.Math.cm.sup.2.

The present invention relates to a semiconductor laser for use in an optical module for measuring distances and/or movements, using the self-mixing effect. The semiconductor laser comprises a layer structure including an active region (3) embedded between two layer sequences (1, 2) and further comprises a photodetector arranged to measure an intensity of an optical field resonating in said laser. The photodetector is a phototransistor composed of an emitter layer (e), a collector layer (c) and a base layer (b), each of which being a bulk layer and forming part of one of said layer sequences (1, 2). With the proposed semiconductor laser an optical module based on this laser can be manufactured more easily, at lower costs and in a smaller size than known modules.

A solar cell contact arrangement, having a semiconductor body with a top and a bottom, wherein the semiconductor body has multiple solar cell stacks and includes a support substrate on the bottom, and each solar cell stack has at least two III-V subcells arranged on the support substrate and at least one through-contact extending from the top to the bottom of the semiconductor body with a continuous side wall, wherein the through-contact has a first edge region on the top and a second edge region on the bottom, and the first edge region has a first section and a second, metallic section, and the second edge region has a first section and a second section, wherein the respective second sections completely enclose the respective first sections, and an insulating layer.

A method for producing a semiconductor light receiving device includes the steps of growing a stacked semiconductor layer including a light-receiving layer having a super-lattice structure, the super-lattice structure including first and second semiconductor layers stacked alternately; forming a mesa structure by etching the stacked semiconductor layer, the mesa structure having a side surface exposed in an atmosphere; forming a deposited layer on the side surface of the mesa structure by supplying a silicon raw material, the deposited layer containing silicon generated from the silicon raw material; and, after the step of forming the deposited layer, forming a passivation film on the side surface of the mesa structure. The first semiconductor layer contains gallium as a constituent element. In the step of forming the deposited layer, the silicon raw material is supplied without supplying an oxygen raw material containing an oxygen element.

An optoelectronic device comprises a substrate; pads on a surface of the substrate; semiconductor elements, each element resting on a pad; a portion covering at least the lateral sides of each pad, the portion preventing the growth of the semiconductor elements on the lateral sides; and a dielectric region extending in the substrate from the surface and connecting, for each pair of pads, one of the pads in the pair to the other pad in the pair. A method of manufacturing an optoelectronic device is also disclosed.

An engineered substrate comprising: a seed layer made of a first semiconductor material for growth of a solar cell; a first bonding layer on the seed layer; a support substrate made of a second semiconductor material; a second bonding layer on a first side of the support substrate; a bonding interface between the first and second bonding layers; the first and second bonding layers each made of metallic material; wherein doping concentration and thickness of the engineered substrate, in particular, of the seed layer, the support substrate, and both the first and second bonding layers, are selected such that the absorption of the seed layer is less than 20%, preferably less than 10%, as well as total area-normalized series resistance of the engineered substrate is less than 10 mOhm.Math.cm.sup.2, preferably less than 5 mOhm.Math.cm.sup.2.

Thin freestanding nitride veneers can be used for the fabrication of semiconductor devices. These veneers are typically less than 100 microns thick. The use of thin veneers also eliminates the need for subsequent wafer thinning for improved thermal performance and 3D packaging.