H01L31/20

Method for manufacturing solar cell

The method for manufacturing a solar cell includes: forming a first semiconductor layer of first conductivity type on a surface of a semiconductor substrate; forming a lift-off layer containing a silicon-based material on the first semiconductor layer; selectively removing the lift-off layer and first semiconductor layer; forming a second semiconductor layer of second conductivity type on a surface having the lift-off layer and first semiconductor layer; and removing the second semiconductor layer covering the lift-off layer by removing the lift-off layer using an etching solution. The linear expansion coefficients of the semiconductor substrate and the lift-off layer satisfy the relational expression: the linear expansion coefficient of the lift-off layer <the linear expansion coefficient of the semiconductor substrate, and the forming of the second semiconductor layer or the removing of the second semiconductor layer is performed at a temperature higher than the temperature in the forming of the lift-off layer.

TWO-DIMENSIONAL SEMICONDUCTOR BASED PRINTABLE OPTOELECTRONIC INKS, FABRICATING METHODS AND APPLICATIONS OF SAME
20210398808 · 2021-12-23 ·

Printable inks based on a 2D semiconductor, such as MoS2, and its applications in fully inkjet-printed optoelectronic devices are disclosed. Specifically, percolating films of MoS2 nanosheets with superlative electrical conductivity (10-2 s m-1) are achieved by tailoring the ink formulation and curing conditions. Based on an ethyl cellulose dispersant, the MoS2 nanosheet ink also offers exceptional viscosity tunability, colloidal stability, and printability on both rigid and flexible substrates. Two distinct classes of photodetectors are fabricated based on the substrate and post-print curing method. While thermal annealing of printed devices on rigid glass substrates leads to a fast photoresponse of 150 μs, photonically annealed devices on flexible polyimide substrates possess high photoresponsivity exceeding 50 mA/W. The photonically annealed photodetector also significantly reduces the curing time down to the millisecond-scale and maintains functionality over 500 bending cycles, thus providing a direct pathway to roll-to-roll manufacturing of next-generation flexible optoelectronics.

TWO-DIMENSIONAL SEMICONDUCTOR BASED PRINTABLE OPTOELECTRONIC INKS, FABRICATING METHODS AND APPLICATIONS OF SAME
20210398808 · 2021-12-23 ·

Printable inks based on a 2D semiconductor, such as MoS2, and its applications in fully inkjet-printed optoelectronic devices are disclosed. Specifically, percolating films of MoS2 nanosheets with superlative electrical conductivity (10-2 s m-1) are achieved by tailoring the ink formulation and curing conditions. Based on an ethyl cellulose dispersant, the MoS2 nanosheet ink also offers exceptional viscosity tunability, colloidal stability, and printability on both rigid and flexible substrates. Two distinct classes of photodetectors are fabricated based on the substrate and post-print curing method. While thermal annealing of printed devices on rigid glass substrates leads to a fast photoresponse of 150 μs, photonically annealed devices on flexible polyimide substrates possess high photoresponsivity exceeding 50 mA/W. The photonically annealed photodetector also significantly reduces the curing time down to the millisecond-scale and maintains functionality over 500 bending cycles, thus providing a direct pathway to roll-to-roll manufacturing of next-generation flexible optoelectronics.

Method for manufacturing single-grained nanowire and method for manufacturing semiconductor device employing same single-grained nanowire
11205570 · 2021-12-21 ·

A method of manufacturing a semiconductor nanowire semiconductor device is described. The method includes forming an amorphous channel material layer on a substrate, patterning the channel material layer to form semiconductor nanowires extending in a lateral direction on the substrate, and forming a cover layer covering an upper of the semiconductor nanowire. The cover layer and the nanowire are patterned to form a trench exposing a side surface of an one end of the semiconductor nanowire and a catalyst material layer is formed in contact with a side surface of the semiconductor nanowire, and metal induced crystallization (MIC) by heat treatment is performed to crystallize the semiconductor nanowire in a length direction of the nanowire from the one end of the semiconductor nanowire in contact with the catalyst material.

A METHOD FOR IMPROVING THE PERFORMANCE OF A HETEROJUNCTION SOLAR CELL
20210376183 · 2021-12-02 ·

The present disclosure provides a method for rapidly treating a heterojunction solar cell fabricated using a crystalline silicon wafer doped exclusively with n-type dopants to improve surface passivation and carrier transport properties using the following steps: providing a heterojunction solar cell; the solar cell having an n-type silicon substrate exclusively doped with n-type dopants with a concentration higher than 1×10.sup.14 cm.sup.−3 and a plurality of metallic contacts; illuminating a surface portion of the solar cell for a period of less than 5 minutes and at a temperature between 200° C. and 300° C. with light having an intensity of at least 2 kW/m.sup.2 and a wavelength such that the light is absorbed by the surface portion and generates electron-hole pairs in the solar cell. The step of illuminating a surface portion of the solar cell is such that less than 0.5 kWh/m.sup.2 of energy is transferred to the surface portion and a temperature of the surface portion increases at a rate of at least 10° C./s for a period of time during illumination.

PHOTOVOLTAIC CELL

A photovoltaic cell may include a hydrogenated amorphous silicon layer including a n-type doped region and a p-type doped region. The n-type doped region may be separated from the p-type doped region by an intrinsic region. The photovoltaic cell may include a front transparent electrode connected to the n-type doped region, and a rear electrode connected to the p-type doped region. The efficiency may be optimized for indoor lighting values by tuning the value of the H2/SiH4 ratio of the hydrogenated amorphous silicon layer.

POSITIVE-INTRINSIC-NEGATIVE (PIN) PHOTOSENSITIVE DEVICE, MANUFACTURING METHOD THEREOF, AND DISPLAY PANEL

A positive-intrinsic-negative (PIN) photosensitive device is provided. A p-type semiconductor layer composed of molybdenum oxide and having valence band energy between valence band energy of an intrinsic semiconductor layer and an upper electrode is used to replace a p-type semiconductor layer used in a conventional PIN photodiode, so that the PIN photodiode may be prepared without using borane gas. More, a difference between valence band energy of the p-type semiconductor layer and the intrinsic semiconductor layer is used to transport holes located in a valence band, so that it is unnecessary to use an active layer of a thin film transistor, so that the PIN photosensitive device may be stacked on the thin film transistor to reduce aperture ratio loss of a display panel.

POSITIVE-INTRINSIC-NEGATIVE (PIN) PHOTOSENSITIVE DEVICE, MANUFACTURING METHOD THEREOF, AND DISPLAY PANEL

A positive-intrinsic-negative (PIN) photosensitive device is provided. A p-type semiconductor layer composed of molybdenum oxide and having valence band energy between valence band energy of an intrinsic semiconductor layer and an upper electrode is used to replace a p-type semiconductor layer used in a conventional PIN photodiode, so that the PIN photodiode may be prepared without using borane gas. More, a difference between valence band energy of the p-type semiconductor layer and the intrinsic semiconductor layer is used to transport holes located in a valence band, so that it is unnecessary to use an active layer of a thin film transistor, so that the PIN photosensitive device may be stacked on the thin film transistor to reduce aperture ratio loss of a display panel.

Tri-layer semiconductor stacks for patterning features on solar cells

Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.

Photodetection film, photodetection sensor and photodetection display apparatus including the photodetection film, and method of making the photodetection film

A photodetection film includes a photodetection transistor. The photodetection transistor includes a gate electrode, a gate insulating layer surroundingly formed on the gate electrode, at least one drain terminal disposed on the gate insulating layer and is spaced apart from the gate electrode, at least one source terminal disposed on the gate insulating layer and is spaced apart from the gate electrode and the at least one drain terminal, and a light-absorbing semiconductor layer disposed on the gate insulating layer and extends between the drain and source terminals. A photodetection sensor, a photodetection display apparatus, and a method of making the photodetection film are also disclosed.