A light-emitting element includes a first n-type contact layer, a light-emitting layer that is located on the first n-type contact layer and emits light at a wavelength of not less than 210 nm and not more than 365 nm, a p-type layer that includes Al.sub.xGa.sub.yIn.sub.1-x-yN (0≤x+y≤1, 0≤x, y≤1) and is located above the light-emitting layer, a second n-type contact layer that includes Al.sub.xGa.sub.yIn.sub.1-x-yN (0≤x+y≤1, 0≤x, y≤1), is located on the p-type layer and forms a tunnel junction with the p-type layer, an n-electrode connected to the first n-type contact layer, and a p-electrode connected to the second n-type contact layer. Band gaps of the p-type layer and the second n-type contact layer are larger than a band gap of the light-emitting layer.

The present invention discloses a micro LED structure including a first semiconductor layer, a first electrode, a second electrode, and an active layer. The first semiconductor layer has two opposite sides defined as a first surface and a second surface. The first semiconductor layer has a doped region located therein and exposed on the first surface. A pn junction is formed between the doped region and the first semiconductor layer. The first electrode and the second electrode, located on the first surface, are capable of electrically connecting to the first semiconductor layer and the doped region respectively. The active layer is adjacent to the second surface. Wherein the first semiconductor layer is a first doping type, and the doped region is a second doping type different from the first doping type, and the first semiconductor layer and the pn junction are located at identical side of the active layer.

A buried layer forming step includes three steps of a facet structure forming step, a c-plane forming step, and a flattening step. In the facet structure forming step, a buried layer grows to form a periodic facet structure that matches an arrangement pattern of columnar semiconductors. In the c-plane forming step, the buried layer grows such that a {0001} plane (upper surface) is formed in a region of the buried layer corresponding to an upper portion of the columnar semiconductor. In the flattening step, lateral growth of the buried layer is promoted and the c-plane formed in the c-plane forming step is widened to flatten a surface of the buried layer.

Provided is a semiconductor light emitting device including a growth substrate; a pillar-shaped semiconductor layer formed on the growth substrate; and a buried semiconductor layer formed to cover the pillar-shaped semiconductor layer, wherein the pillar-shaped semiconductor layer has an n-type nanowire layer formed at a center, an active layer formed on an outermore side than the n-type nanowire layer, a p-type semiconductor layer formed on an outermore side than the active layer and a tunnel junction layer formed on an outermore side than the p-type semiconductor layer, and wherein at least a part of the pillar-shaped semiconductor layer is provided with a removed region formed by removing from the buried semiconductor layer to a part of the tunnel junction layer.

A method of manufacturing an image display device includes: providing a semiconductor growth substrate comprising a semiconductor layer; providing a circuit substrate comprising: a circuit element, a first wiring layer, and a first insulating film; forming a first metal layer that is located on the first insulating film and is electrically connected to the first wiring layer; bonding the semiconductor growth substrate to the circuit substrate and electrically connecting the first metal layer to the semiconductor layer; etching the semiconductor layer to form a light-emitting element; etching the first metal layer to form a plug electrically connected to the light-emitting element; forming a second insulating film covering the plug, the light-emitting element, and the first insulating film; removing a portion of the second insulating film to expose a light-emitting surface of the light-emitting element; and forming a second wiring layer electrically connected to the light-emitting surface.

Proposed is a dual emission LED chip that emits light to the upper and lower sides of a PN junction, wherein the duel emission LED chip uses the electroluminescent effect of the PN junction including a P layer and an N layer provided below the P layer, and characterized in that the dual emission LED chip emits light in the upward direction of the P layer and the downward direction of the N layer. The dual emission chip can be applied as a single chip to a field requiring dual emission, thereby enabling miniaturization of applied equipment, and increases power efficiency, thereby reducing manufacturing costs. In addition, as the dual emission LED chip can be manufactured through a batch process, a separate packaging process is not required.

Described herein are systems incorporating a Casimir cavity, such as an optical Casimir cavity or a plasmon Casimir cavity. The Casimir cavity modifies the zero-point energy density therein as compared to outside of the Casimir cavity. The Casimir cavities are paired in the disclosed systems with product generating devices and the difference in zero-point energy densities is used to directly drive the generation of products, such as chemical reaction products or emitted light.

A light emitting diode (LED) pixel for a display including a substrate, a first LED stack disposed on the substrate, a second LED stack disposed on the first LED stack, a third LED stack disposed on the second LED stack, and through-hole vias formed through the substrate, in which each of the first, second, and third LED stacks includes a first conductivity type semiconductor layer and a second conductivity type semiconductor layer, and each of the through-hole vias is electrically connected to at least one of the first, second, and third LED stacks.

A light emitting diode (LED) pixel for a display including a first LED stack, a second LED stack disposed on a partial region of the first LED stack, a third LED stack disposed on a partial region of the second LED stack, a first ohmic electrode disposed on the first LED stack and forming ohmic contact with the first LED stack, a second transparent electrode disposed between the second LED stack and the third LED stack and in ohmic contact with an upper surface of the second LED stack, and a third transparent electrode in ohmic contact with an upper surface of the third LED stack, in which the first ohmic electrode is laterally spaced apart from the second LED stack.

[Object] A light-emitting element includes: a semiconductor layer; a first electrode portion; a second electrode portion; a first insulating layer; and a metal layer. The semiconductor layer includes an active layer, a first-conductivity-type layer, and a second-conductivity-type layer, and has a semiconductor-layer side surface including a side surface of the active layer, a side surface of the first-conductivity-type layer, and a side surface of the second-conductivity-type layer. The first electrode portion is connected to the first-conductivity-type layer. The second electrode portion is connected to the second-conductivity-type layer. The first insulating layer is in contact at least with a part of the semiconductor-layer side surface, the part of the semiconductor-layer side surface corresponding to a part of the side surface of the active layer. The metal layer is in contact at least with an opposed surface of the first insulating layer, the opposed surface of the first insulating layer facing the side surface of the active layer. The metal layer is conducted to the first electrode portion and insulated from the second electrode portion.