Semiconductor structures involving multiple quantum wells provide increased efficiency of UV and visible light emitting diodes (LEDs) and other emitter devices, particularly at high driving current. LEDs made with the new designs have reduced efficiency droop under high current injection and increased overall external quantum efficiency. The active region of the devices includes separation layers configured between the well layers, the one or more separation regions being configured to have a first mode to act as one or more barrier regions separating a plurality of carriers in a quantum confined mode in each of the quantum wells being provided on each side of the one or more separation layers and a second mode to cause spreading of the plurality of carriers across each of the quantum wells to increase an overlap integral of all of the plurality of carriers. The devices and methods of the invention provide improved efficiency for solid state lighting, including high efficiency ultraviolet LEDs.

Semiconductor structures involving multiple quantum wells provide increased efficiency of UV and visible light emitting diodes (LEDs) and other emitter devices, particularly at high driving current. LEDs made with the new designs have reduced efficiency droop under high current injection and increased overall external quantum efficiency. The active region of the devices includes separation layers configured between the well layers, the one or more separation regions being configured to have a first mode to act as one or more barrier regions separating a plurality of carriers in a quantum confined mode in each of the quantum wells being provided on each side of the one or more separation layers and a second mode to cause spreading of the plurality of carriers across each of the quantum wells to increase an overlap integral of all of the plurality of carriers. The devices and methods of the invention provide improved efficiency for solid state lighting, including high efficiency ultraviolet LEDs.

A semiconductor body main include a III-V compound semiconductor material having a p-conductive region doped with a p-dopant. The p-conductive region may include at least one first section, one second section, and one third section. The second section may be arranged between the first and third sections. The second section may directly adjoin the first and third sections. An indium concentration of at least one of the sections differs from an indium concentration of the other two sections.

A semiconductor structure can include a substrate comprising a first in-plane lattice constant, a graded layer on the substrate, and a first region of the graded layer comprising a first epitaxial oxide material comprising a second in-plane lattice constant. The graded layer on the substrate can include (Al.sub.x1Ga.sub.1−x1).sub.y1O.sub.z1, wherein x1 is from 0 to 1, wherein y1 is from 1 to 3, wherein z1 is from 2 to 4, and wherein x1 varies in a growth direction such that the graded layer has the first in-plane lattice constant adjacent to the substrate and a second in-plane lattice constant at a surface of the graded layer opposite the substrate. In some cases, a semiconductor structure includes a first region comprising a first epitaxial oxide material; a second region comprising a second epitaxial oxide material; and the graded region located between the first and the second regions.

A semiconductor structure can include a substrate comprising a first in-plane lattice constant, a graded layer on the substrate, and a first region of the graded layer comprising a first epitaxial oxide material comprising a second in-plane lattice constant. The graded layer on the substrate can include (Al.sub.x1Ga.sub.1−x1).sub.y1O.sub.z1, wherein x1 is from 0 to 1, wherein y1 is from 1 to 3, wherein z1 is from 2 to 4, and wherein x1 varies in a growth direction such that the graded layer has the first in-plane lattice constant adjacent to the substrate and a second in-plane lattice constant at a surface of the graded layer opposite the substrate. In some cases, a semiconductor structure includes a first region comprising a first epitaxial oxide material; a second region comprising a second epitaxial oxide material; and the graded region located between the first and the second regions.

A semiconductor light emitting device includes a conductive substrate and a first metal layer disposed on the substrate. The first metal layer is formed so as to be electrically connected with the substrate, and the first metal layer includes an Au based material. A joining layer is formed on the first metal layer. The joining layer includes a second metal layer including Au and a third metal layer including Au. A metallic contact layer and an insulating layer are formed on the joining layer. A semiconductor layer is formed on the metallic contact layer and the insulating layer and includes a red-based light emitting layer. An electrode is formed on the semiconductor layer and is made of metal. The insulating layer includes a patterned aperture, and at least a part of the metallic contact layer is formed in the aperture.

A semiconductor light emitting device includes a conductive substrate and a first metal layer disposed on the substrate. The first metal layer is formed so as to be electrically connected with the substrate, and the first metal layer includes an Au based material. A joining layer is formed on the first metal layer. The joining layer includes a second metal layer including Au and a third metal layer including Au. A metallic contact layer and an insulating layer are formed on the joining layer. A semiconductor layer is formed on the metallic contact layer and the insulating layer and includes a red-based light emitting layer. An electrode is formed on the semiconductor layer and is made of metal. The insulating layer includes a patterned aperture, and at least a part of the metallic contact layer is formed in the aperture.

A light-emitting element according to the present invention includes an anode, a hole transport layer, and a light-emitting layer containing a quantum dot, and a cathode in this order, and the hole transport layer includes an n+-type semiconductor layer, and a p+-type semiconductor layer adjacent to the n+-type semiconductor layer and disposed closer to the light-emitting layer than the n+-type semiconductor layer (24).

A method for manufacturing a light-emitting device includes performing application, performing temperature raising, and performing first light irradiation. In the performing application, a solution including quantum dots, a ligand, an inorganic precursor, and a solvent is applied on a position overlapping with the substrate. The quantum dots each includes a core and a first shell coating the core. In the performing temperature raising, a temperature is raised until the ligand melts and the solvent vaporizes after the performing application. In the performing first light irradiation, light irradiation is performed after the performing temperature raising. In the performing first light irradiation, the inorganic precursor is epitaxially grown around the first shell to form a second shell coating the first shell, and an inorganic film in which the inorganic precursor is epitaxially grown at an interface between the quantum dot layer and the first charge transport layer is formed.

A method for manufacturing a light-emitting device includes performing application, performing temperature raising, and performing first light irradiation. In the performing application, a solution including quantum dots, a ligand, an inorganic precursor, and a solvent is applied on a position overlapping with the substrate. The quantum dots each includes a core and a first shell coating the core. In the performing temperature raising, a temperature is raised until the ligand melts and the solvent vaporizes after the performing application. In the performing first light irradiation, light irradiation is performed after the performing temperature raising. In the performing first light irradiation, the inorganic precursor is epitaxially grown around the first shell to form a second shell coating the first shell, and an inorganic film in which the inorganic precursor is epitaxially grown at an interface between the quantum dot layer and the first charge transport layer is formed.