A light-emitting diode includes a light-emitting structure, a first insulating layer and a first electrode layer. The first electrode layer is formed on the first insulating layer and in the first opening, and is electrically connected to the first semiconductor layer through the first opening. The first electrode layer includes a first metal reflective layer and a stress adjustment layer. The first metal reflective layer in the first opening is in contact with the first semiconductor layer, and located between the first semiconductor layer and the stress adjustment layer. The first metal reflective layer and the stress adjustment layer contain a same metal element, and a content of the same metal element in the first metal reflective layer is greater than that in the stress adjustment layer.

A light-emitting diode includes a light-emitting structure, a first insulating layer and a first electrode layer. The first electrode layer is formed on the first insulating layer and in the first opening, and is electrically connected to the first semiconductor layer through the first opening. The first electrode layer includes a first metal reflective layer and a stress adjustment layer. The first metal reflective layer in the first opening is in contact with the first semiconductor layer, and located between the first semiconductor layer and the stress adjustment layer. The first metal reflective layer and the stress adjustment layer contain a same metal element, and a content of the same metal element in the first metal reflective layer is greater than that in the stress adjustment layer.

A semiconductor device, includes: a first conductive type semiconductor region including a first semiconductor structure, wherein the first semiconductor structure includes one or more pairs of stack, the one or more pairs of stack respectively includes a first layer and a second layer, the first layer includes Al.sub.xGa.sub.1-xN, the second layer includes Al.sub.yGa.sub.1-yN, wherein 0≤x<1, 0<y<1, x<y, wherein one of the one or more pairs of stack includes an interface region located between the first layer and the second layer adjacent to the first layer; a second conductive type semiconductor region located on the first conductive type semiconductor region; and an active region located between the first conductive type semiconductor region and the second conductive type semiconductor region; wherein the first semiconductor structure includes a first dopant having a first doping concentration with a peak value at the interface region.

A light-emitting device includes a semiconductor structure including a first semiconductor layer, a second semiconductor layer, and an active layer formed between the first semiconductor layer and the second semiconductor layer; a via penetrating the second semiconductor layer and the active layer to expose a surface of the first semiconductor layer; a first electrode formed in the via and on the second semiconductor layer; a second electrode formed on the second semiconductor layer; and an insulating structure covering the first electrode, the second electrode and the semiconductor structure and including a first opening to expose the first electrode and a second opening to expose the second electrode, wherein the first electrode and the second electrode respectively include a metal layer contacting the insulating layer, the metal layer includes a material including a surface tension value larger than 1500 dyne/cm and a standard reduction potential larger than 0.3 V.

An apparatus with micro devices includes a circuit substrate, at least one micro device, and at least one light guide structure. The micro device is disposed on the circuit substrate. The micro device has a top surface and a bottom surface opposite to each other, a peripheral surface connected with the top surface and the bottom surface, a first-type electrode, and a second-type electrode. The light guide structure is disposed on the circuit substrate and is not in direct contact with the first-type electrode and the second-type electrode. The light guide structure includes at least one connecting portion and at least one holding portion. The connecting portion is disposed on an edge of the top surface of the micro device. An orthographic projection area of the light guide structure on the top surface is smaller than an area of the top surface.

An apparatus with micro devices includes a circuit substrate, at least one micro device, and at least one light guide structure. The micro device is disposed on the circuit substrate. The micro device has a top surface and a bottom surface opposite to each other, a peripheral surface connected with the top surface and the bottom surface, a first-type electrode, and a second-type electrode. The light guide structure is disposed on the circuit substrate and is not in direct contact with the first-type electrode and the second-type electrode. The light guide structure includes at least one connecting portion and at least one holding portion. The connecting portion is disposed on an edge of the top surface of the micro device. An orthographic projection area of the light guide structure on the top surface is smaller than an area of the top surface.

A light emitting device including a plurality of pixels is provided by the present disclosure. Each of the plurality of pixels includes at least two light emitting diodes, and the at least two light emitting didoes are electrically connected with each other in series, wherein the at least two light emitting diodes have peak external quantum efficiencies under different currents.

A light emitting device including a plurality of pixels is provided by the present disclosure. Each of the plurality of pixels includes at least two light emitting diodes, and the at least two light emitting didoes are electrically connected with each other in series, wherein the at least two light emitting diodes have peak external quantum efficiencies under different currents.

Disclosed are an epitaxial structure of a semiconductor device, a manufacturing method, and a semiconductor device. The epitaxial structure includes a substrate and a semiconductor layer; the semiconductor layer includes a buffer layer; the buffer layer includes a first buffer subsection and a second buffer subsection which are connected to each other and arranged along a direction from a source preset region to a drain preset region, and a vertical projection on the substrate of the first buffer subsection overlaps with a vertical projection on the substrate of the source preset region, and a vertical projection on the substrate of the second buffer subsection overlaps with a vertical projection on the substrate of each of the gate preset region and the drain preset region; an ion implant concentration in the second buffer subsection is greater than or equal to an ion implant concentration in the first buffer subsection.

Disclosed are an epitaxial structure of a semiconductor device, a manufacturing method, and a semiconductor device. The epitaxial structure includes a substrate and a semiconductor layer; the semiconductor layer includes a buffer layer; the buffer layer includes a first buffer subsection and a second buffer subsection which are connected to each other and arranged along a direction from a source preset region to a drain preset region, and a vertical projection on the substrate of the first buffer subsection overlaps with a vertical projection on the substrate of the source preset region, and a vertical projection on the substrate of the second buffer subsection overlaps with a vertical projection on the substrate of each of the gate preset region and the drain preset region; an ion implant concentration in the second buffer subsection is greater than or equal to an ion implant concentration in the first buffer subsection.