Patent classifications
H01L33/14
Heterostructure including a semiconductor layer with graded composition
An improved heterostructure for an optoelectronic device is provided. The heterostructure includes an active region, an electron blocking layer, and a p-type contact layer. The heterostructure can include a p-type interlayer located between the electron blocking layer and the p-type contact layer. In an embodiment, the electron blocking layer can have a region of graded transition. The p-type interlayer can also include a region of graded transition.
Pixel of micro display having inclined side
Disclosed is a unit pixel of a micro-display capable of minimizing light emitted through a side surface. A side surface of the unit pixel having a vertically stacked pixel structure is etched and has inclination angle. Light directed toward the side surface is reflected by the side surface inclined at an angle, and the light is emitted in a direction perpendicular to the growth surface or the surface of the growth substrate.
Light emitting element
A light emitting element includes: a substrate; a base layer disposed on the substrate; at least one rod-shaped light emitting portion comprising: a first conductivity type semiconductor rod disposed on the base layer and having a plurality of side surfaces arranged to form a polygonal column shape, an active layer formed of a semiconductor and covering the side surfaces of the first conductivity type semiconductor rod, and a second conductive type semiconductor layer covering the active layer. The active layer includes a plurality of well layers respectively disposed over at least two adjacent side surfaces among the plurality of side surfaces of the first conductivity type semiconductor rod. Adjacent well layers among the plurality of well layers are separated from each other along a ridge line where the at least two adjacent side surfaces are in contact with each other.
FORMING METHOD OF FLIP-CHIP LIGHT EMITTING DIODE STRUCTURE
The forming method of a flip-chip light emitting diode structure includes the following steps. A first substrate including a first semiconductor layer, an active layer on the first semiconductor layer and a second semiconductor layer on the active layer is provided. A first current blocking layer is formed on the second semiconductor layer, in which the first current blocking layer has a plurality of interspaces. A reflective layer covering the interspaces is formed, in which the reflective layer has a plurality of recesses, and each of the recesses is corresponding to each of the interspaces. A second current blocking layer filling into the recesses is formed.
ULTRAVIOLET LED AND MANUFACTURING METHOD THEREOF
This application provides an ultraviolet LED and a manufacturing method thereof. In the manufacturing method, an N-type transition layer is formed above an electron supply layer and/or a P-type transition layer is formed above a hole supply layer, materials of the electron supply layer and the hole supply layer include at least three elements: Al, Ga and N, and materials of the N-type transition layer and the P-type transition layer are GaN; an N electrode is formed on the N-type transition layer, and an ohmic contact is formed between the N-type transition layer and the N electrode; a P electrode is formed on the P-type transition layer, and an ohmic contact is formed between the P-type transition layer and the P electrode.
ULTRAVIOLET LED AND MANUFACTURING METHOD THEREOF
This application provides an ultraviolet LED and a manufacturing method thereof. In the manufacturing method, an N-type transition layer is formed above an electron supply layer and/or a P-type transition layer is formed above a hole supply layer, materials of the electron supply layer and the hole supply layer include at least three elements: Al, Ga and N, and materials of the N-type transition layer and the P-type transition layer are GaN; an N electrode is formed on the N-type transition layer, and an ohmic contact is formed between the N-type transition layer and the N electrode; a P electrode is formed on the P-type transition layer, and an ohmic contact is formed between the P-type transition layer and the P electrode.
LIGHT-EMITTING DEVICE AND DISPLAY DEVICE
A light-emitting device includes a substrate, a semiconductor structure, and an insulating reflective layer. The substrate has an upper surface and a lower surface. The semiconductor structure is disposed on the upper surface of the substrate. A projection of the semiconductor structure on the upper surface of the substrate has an outer periphery spaced apart a distance from an outer periphery of the upper surface of the substrate. The insulating reflective layer covers at least a part of the semiconductor structure and has an extending portion extending outwardly from the semiconductor structure and covering a part of the upper surface of the substrate. A peripheral end of the extending portion of the insulating reflective layer has an inclined lateral surface, and an included angle defined between the inclined lateral surface and the upper surface of the substrate is not less than 60°.
LIGHT-EMITTING DIODE AND LIGHT-EMITTING MODULE HAVING THE SAME
A light emitting device includes a semiconductor structure and an insulating layer. The semiconductor structure has a mesa recess extending from a top surface of a second semiconductor layer to a top surface of a first semiconductor layer. The insulating layer covers the semiconductor structure and has an electrode passage hole on the top surface of the first semiconductor at the bottom of the mesa recess. The second semiconductor layer has a top boundary edge intersecting the boundary wall of the mesa recess above the electrode passage hole. A minimum distance from the electrode passage hole to the top boundary edge of the second semiconductor layer is no less than 1 μm.
RADIATION EMITTING SEMICONDUCTOR CHIP
A radiation emitting semiconductor chip may be configured to emit electromagnetic radiation from a radiation exit surface during operation. The chip may include a carrier on which a first epitaxial semiconductor layer sequence of a first conductivity type and a second epitaxial semiconductor layer sequence of a second conductivity type different from the first conductivity type are arranged, a first current spreading layer arranged between the first semiconductor layer sequence and the carrier, a second current spreading layer arranged between the first current spreading layer and the carrier, a dielectric layer arranged in regions between the first current spreading layer and the second current spreading layer, a reflective layer arranged between the second current spreading layer and the carrier, and an electrically insulating layer arranged in regions between the second current spreading layer and the reflective layer.
RADIATION EMITTING SEMICONDUCTOR CHIP
A radiation emitting semiconductor chip may be configured to emit electromagnetic radiation from a radiation exit surface during operation. The chip may include a carrier on which a first epitaxial semiconductor layer sequence of a first conductivity type and a second epitaxial semiconductor layer sequence of a second conductivity type different from the first conductivity type are arranged, a first current spreading layer arranged between the first semiconductor layer sequence and the carrier, a second current spreading layer arranged between the first current spreading layer and the carrier, a dielectric layer arranged in regions between the first current spreading layer and the second current spreading layer, a reflective layer arranged between the second current spreading layer and the carrier, and an electrically insulating layer arranged in regions between the second current spreading layer and the reflective layer.