Patent classifications
H01L33/16
Epitaxial oxide field effect transistor
The present disclosure describes epitaxial oxide field effect transistors (FETs). In some embodiments, a FET comprises: a substrate comprising an oxide material; an epitaxial semiconductor layer on the substrate; a gate layer on the epitaxial semiconductor layer; and electrical contacts. In some cases, the epitaxial semiconductor layer can comprise a superlattice comprising a first and a second set of layers comprising oxide materials with a first and second bandgap. The gate layer can comprise an oxide material with a third bandgap, wherein the third bandgap is wider than the first bandgap. In some cases, the epitaxial semiconductor layer can comprise a second oxide material with a first bandgap, wherein the second oxide material comprises single crystal A.sub.xB.sub.1-xO.sub.n, wherein 0<x<1.0, wherein A is Al and/or Ga, wherein B is Mg, Ni, a rare earth, Er, Gd, Ir, Bi, or Li.
Group 13 element nitride layer, free-standing substrate and functional element
A layer of a crystal of a group 13 nitride selected from gallium nitride, aluminum nitride, indium nitride and the mixed crystals thereof has an upper surface and a bottom surface. The upper surface of a crystal layer of the group 13 nitride includes a linear high-luminance light-emitting part and a low-luminance light-emitting region adjacent to the high-luminance light-emitting part, observed by cathode luminescence. The high-luminance light-emitting part includes a portion extending along an m-plane of the crystal of the group 13 nitride. The crystal of the nitride of the group 13 element contains oxygen atoms in a content of 1×10.sup.18 atom/cm.sup.3 or less, silicon atoms, manganese atoms, carbon atoms, magnesium atoms and calcium atoms in contents of 1×10.sup.17 atom/cm.sup.3 or less, chromium atoms in a content of 1×10.sup.16 atom/cm.sup.3 or less and chlorine atoms in a content of 1×10.sup.15 atom/cm.sup.3 or less.
Multicolour Light Emitting Structure
A method of forming a light emitting structure, the light emitting structure comprising: a first light emitting region configured to emit light having a first primary peak wavelength; a second light emitting region configured to emit light having a second primary peak wavelength, wherein the first primary peak wavelength is different to the second primary peak wavelength; and a partially reflective layer positioned at least partially between the first light emitting region and the second light emitting region, wherein the partially reflective layer is configured to reflect light having the first primary peak wavelength emitted by the first light emitting region and allow light having the second primary peak wavelength emitted by the second light emitting region to pass through the partially reflective layer.
Light emitting element
A light emitting element includes: a substrate; a base layer disposed on the substrate; at least one rod-shaped light emitting portion comprising: a first conductivity type semiconductor rod disposed on the base layer and having a plurality of side surfaces arranged to form a polygonal column shape, an active layer formed of a semiconductor and covering the side surfaces of the first conductivity type semiconductor rod, and a second conductive type semiconductor layer covering the active layer. The active layer includes a plurality of well layers respectively disposed over at least two adjacent side surfaces among the plurality of side surfaces of the first conductivity type semiconductor rod. Adjacent well layers among the plurality of well layers are separated from each other along a ridge line where the at least two adjacent side surfaces are in contact with each other.
Light emitting element
A light emitting element includes: a substrate; a base layer disposed on the substrate; at least one rod-shaped light emitting portion comprising: a first conductivity type semiconductor rod disposed on the base layer and having a plurality of side surfaces arranged to form a polygonal column shape, an active layer formed of a semiconductor and covering the side surfaces of the first conductivity type semiconductor rod, and a second conductive type semiconductor layer covering the active layer. The active layer includes a plurality of well layers respectively disposed over at least two adjacent side surfaces among the plurality of side surfaces of the first conductivity type semiconductor rod. Adjacent well layers among the plurality of well layers are separated from each other along a ridge line where the at least two adjacent side surfaces are in contact with each other.
GROUP-III-NITRIDE STRUCTURES AND MANUFACTURING METHODS THEREOF
A group-III-nitride structure and a manufacturing method thereof are provided. In the manufacturing method, a first mask layer is first formed on a substrate; an uncoalesced second group-III-nitride epitaxial layer is formed by performing a first epitaxial growth with the first mask layer as a mask; and a second mask layer is formed at least on the second group-III-nitride epitaxial layer; a third group-III-nitride epitaxial layer is laterally grown and formed by performing a second epitaxial growth on the second group-III-nitride epitaxial layer with the second mask layer as a mask, where the second group-III-nitride epitaxial layer is coalesced by the third group-III-nitride epitaxial layer; a fourth group-III-nitride epitaxial layer is formed by performing a third epitaxial growth on the third group-III-nitride epitaxial layer.
GROUP-III-NITRIDE STRUCTURES AND MANUFACTURING METHODS THEREOF
A group-III-nitride structure and a manufacturing method thereof are provided. In the manufacturing method, a first mask layer is first formed on a substrate; an uncoalesced second group-III-nitride epitaxial layer is formed by performing a first epitaxial growth with the first mask layer as a mask; and a second mask layer is formed at least on the second group-III-nitride epitaxial layer; a third group-III-nitride epitaxial layer is laterally grown and formed by performing a second epitaxial growth on the second group-III-nitride epitaxial layer with the second mask layer as a mask, where the second group-III-nitride epitaxial layer is coalesced by the third group-III-nitride epitaxial layer; a fourth group-III-nitride epitaxial layer is formed by performing a third epitaxial growth on the third group-III-nitride epitaxial layer.
SEMIPOLAR MICRO-LED
A light emitting diode includes an n-type semiconductor layer including a pit structure formed therein, active layers grown only on sidewalls of the pit structure and configured to emit light, and a p-type semiconductor layer on the active layers and at least partially in the pit structure. In one embodiment, the pit structure is characterized by a shape of an inverted pyramid. The pit structure is formed in the n-type semiconductor layer by, for example, etching the n-type semiconductor layer using an etch mask layer having apertures with slanted sidewalls, or growing the n-type semiconductor layer on a substrate through a mask layer having an array of apertures.
ELECTRONIC DEVICE
An electronic device is provided. The electronic device includes a substrate, a first semiconductor element, and a second semiconductor element. The first semiconductor element is disposed on the substrate. The first semiconductor element includes a first polarity direction. The second semiconductor element is disposed on the substrate and is adjacent to the first semiconductor element. The second semiconductor element includes a second polarity direction. The first polarity direction and the second polarity direction are different. In the disclosure, the problem of chromatic aberration of the electronic device at different viewing angles is improved.
Epitaxial oxide high electron mobility transistor
The present disclosure describes epitaxial oxide high electron mobility transistors (HEMTs). In some embodiments, a HEMT comprises: a substrate; a template layer on the substrate; a first epitaxial semiconductor layer on the template layer; and a second epitaxial semiconductor layer on the first epitaxial semiconductor layer. The template layer can comprise crystalline metallic Al(111). The first epitaxial semiconductor layer can comprise (Al.sub.xGa.sub.1-x).sub.yO.sub.z, wherein 0≤x≤1, 1≤y≤3, and 2≤z≤4, wherein the (Al.sub.xGa.sub.1-x).sub.yO.sub.z comprises a Pna21 space group, and wherein the (Al.sub.xGa.sub.1-x).sub.yO.sub.z comprises a first conductivity type formed via polarization. The second epitaxial semiconductor layer can comprise a second oxide material.