A light emitting element includes: a semiconductor structure; first and second electrodes formed above the semiconductor structure; and a protective film. In a plan view: the first electrode has a first connecting portion, a first extending portion, and two second extending portions, the second electrode has a second connecting portion, and two third extending portions, the first extending portion extends linearly in a direction from the first connecting portion toward the second connecting portion, the two second extending portions are located on opposite sides of the first extending portion, respectively, with each of the second extending portions having two bent portions and a linear portion extending parallel to the first extending portion and located between the two bent portions, and the two third extending portions are located between the first extending portion and the two second extending portions, respectively.

A light emitting element includes: a semiconductor structure; first and second electrodes formed above the semiconductor structure; and a protective film. In a plan view: the first electrode has a first connecting portion, a first extending portion, and two second extending portions, the second electrode has a second connecting portion, and two third extending portions, the first extending portion extends linearly in a direction from the first connecting portion toward the second connecting portion, the two second extending portions are located on opposite sides of the first extending portion, respectively, with each of the second extending portions having two bent portions and a linear portion extending parallel to the first extending portion and located between the two bent portions, and the two third extending portions are located between the first extending portion and the two second extending portions, respectively.

A light emitting device includes a first active layer on a substrate, a current spreading length, and a plurality of mesa regions on the first active layer. At least a first portion of the first active layer can comprise a first electrical polarity. Each mesa region can include, at least a second portion of the first active layer, a light emitting region on the second portion of the first active layer with a dimension parallel to the substrate smaller than twice the current spreading length, and a second active layer on the light emitting region. The light emitting region can be configured to emit light with a target wavelength from 200 nm to 300 nm. At least a portion of the second active layer can comprise a second electrical polarity.

The semiconductor light-emitting element includes an n-type semiconductor layer; an active layer on the n-type semiconductor layer; a p-type semiconductor layer on the active layer; a p-side contact electrode in contact with the p-type semiconductor layer; a p-side current diffusion layer on the p-side contact electrode; an n-side contact electrode in contact with the n-type semiconductor layer; and an n-side current diffusion layer that includes a first current diffusion layer on the n-side contact electrode, and a second current diffusion layer on the first current diffusion layer, and including a TiN layer. A height difference between upper surfaces of the p-side contact electrode and the first current diffusion layer is 100 nm or smaller; and a height difference between upper surfaces of the p-side current diffusion layer and the second current diffusion layer is 100 nm or smaller.

The semiconductor light-emitting element includes an n-type semiconductor layer; an active layer on the n-type semiconductor layer; a p-type semiconductor layer on the active layer; a p-side contact electrode in contact with the p-type semiconductor layer; a p-side current diffusion layer on the p-side contact electrode; an n-side contact electrode in contact with the n-type semiconductor layer; and an n-side current diffusion layer that includes a first current diffusion layer on the n-side contact electrode, and a second current diffusion layer on the first current diffusion layer, and including a TiN layer. A height difference between upper surfaces of the p-side contact electrode and the first current diffusion layer is 100 nm or smaller; and a height difference between upper surfaces of the p-side current diffusion layer and the second current diffusion layer is 100 nm or smaller.

A plant cultivation light source includes a plurality of light sources configured to be turned on or turned off depending on a selected plant and a growth stage of the selected plant, and a controller. The controller is operable to turn on the light sources during a light period such that the light sources are operable to emit a light having a spectrum with a plurality of peaks to the selected plant. The light period including a first period and a second period and the first period preceding or following the second period. The controller is operable to adjust the spectrum of the light to alternate the first period and the second period during the light period.

Discussed is a display device including a base part; a plurality of assembly electrodes disposed on the base part and having a first electrode and a second electrode that generate an electric field when power is applied; a dielectric layer disposed to cover the plurality of assembly electrodes; and a plurality of semiconductor light emitting devices disposed on a surface of the dielectric layer, wherein one surface of the plurality of semiconductor light emitting devices facing the dielectric layer and one surface of the dielectric layer facing the plurality of semiconductor light emitting devices respectively comprise a concave-convex structure.

A light-emitting device, includes a substrate, including an upper surface; a first light emitting unit and a second light emitting unit, formed on the upper surface, wherein each of the first light emitting unit and the second light emitting unit includes a lower semiconductor portion and an upper semiconductor portion; and a conductive structure electrically connecting the first light emitting unit and the second light emitting unit; wherein the lower semiconductor portion of the first light emitting unit includes a first sidewall and a first upper surface; and wherein the first side wall includes a first sub-side wall and a second sub-side wall, an obtuse angle is formed between the first sub-side wall and the first upper surface and another obtuse angle is formed between the second sub-side wall and the upper surface.

A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.

A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.