H01L33/62

DISPLAY DEVICE
20230046443 · 2023-02-16 ·

A display device includes: a substrate; a partition wall on the substrate; a plurality of light emitting areas on the substrate, the light emitting areas including a first light emitting area, a second light emitting area, and a third light emitting area partitioned by the partition wall; a first light emitting element in the first light emitting area and configured to emit first light; a second light emitting element in the second light emitting area and configured to emit second light; and a third light emitting element in the third light emitting area and configured to emit third light. An area of the first light emitting area is larger than an area of the first light emitting element and is larger than an area of the second light emitting area and an area of the third light emitting area.

DISPLAY DEVICE
20230046443 · 2023-02-16 ·

A display device includes: a substrate; a partition wall on the substrate; a plurality of light emitting areas on the substrate, the light emitting areas including a first light emitting area, a second light emitting area, and a third light emitting area partitioned by the partition wall; a first light emitting element in the first light emitting area and configured to emit first light; a second light emitting element in the second light emitting area and configured to emit second light; and a third light emitting element in the third light emitting area and configured to emit third light. An area of the first light emitting area is larger than an area of the first light emitting element and is larger than an area of the second light emitting area and an area of the third light emitting area.

Nanocavities, and systems, devices, and methods of use

Disclosed are dielectric cavity arrays with cavities formed by pairs of dielectric tips, wherein the cavities have low mode volume (e.g., 7*10.sup.−5λ.sup.3, where X is the resonance wavelength of the cavity array), and large quality factor Q (e.g., 10.sup.6 or more). Applications for such dielectric cavity arrays include, but are not limited to, Raman spectroscopy, second harmonic generation, optical signal detection, microwave-to-optical transduction, and as light emitting devices.

Probe card for efficient screening of highly-scaled monolithic semiconductor devices

Enhanced probe cards, for testing unpackaged semiconductor die including numerous discrete devices (e.g., LEDs), are described. The die includes anodes and cathodes for the LEDs. Via a single touchdown event, the probe card may simultaneously operate each of the LEDs. The LEDs' optical output is measured and the performance of the die is characterized. The probe card includes a conductive first contact and another contact that are fabricated from a conformal sheet or film. Upon the touchdown event, the first contact makes contact with each of the die's anodes and the other contact makes contact with each of the die's cathodes. The vertical and sheet resistance of the contacts are sufficient such that the voltage drop across the vertical dimension of the contacts is approximately an order of magnitude greater than the operating voltage of the LEDs and current-sharing between adjacent LEDs is limited by the sheet resistance.

Circuit board with heat dissipation function and method for manufacturing the same

A circuit board with improved heat dissipation function and a method for manufacturing the circuit board are provided. The method includes providing a first metal layer defining a first slot; forming a first adhesive layer in the first slot; electroplating copper on each first pillar to form a first heat conducting portion; forming a first insulating layer on the first adhesive layer having the first heat conducting portion, and defining a first blind hole in the first insulating layer; filling the first blind hole with thermoelectric separation metal to form a second heat conducting portion; forming a first wiring layer on the first insulating layer; forming a second insulating layer on the first wiring layer, defining a second blind hole on the second insulating layer; electroplating copper in the second blind hole to form a third heat conducting portion; mounting an electronic component on the second insulating layer.

Package
11581463 · 2023-02-14 · ·

A package includes a first lead including a first electrode terminal, a second lead including a second electrode terminal, a first molded body holding the first lead, and a second molded body holding the second lead. The second lead is provided on the first lead in an overlapping direction such that the first electrode terminal of the first lead overlaps with the second electrode terminal of the second lead when viewed in the overlapping direction. The first electrode terminal and the second electrode terminal are electrically connected to each other without adding additional material. A part of the first molded body and a part of the second molded body are in contact with each other.

Package
11581463 · 2023-02-14 · ·

A package includes a first lead including a first electrode terminal, a second lead including a second electrode terminal, a first molded body holding the first lead, and a second molded body holding the second lead. The second lead is provided on the first lead in an overlapping direction such that the first electrode terminal of the first lead overlaps with the second electrode terminal of the second lead when viewed in the overlapping direction. The first electrode terminal and the second electrode terminal are electrically connected to each other without adding additional material. A part of the first molded body and a part of the second molded body are in contact with each other.

Photo-emitting and/or photo-receiving diode array device

Photo-emitting and/or photo-receiving diode array device, comprising: a stack of first and second semiconductor layers doped according to different types; first trenches passing through the stack and surrounding a region of the stack wherein several diodes are formed; dielectric portions arranged in the first trenches and covering lateral flanks of said region over the entire thickness of the second layer and a first part of the thickness of the first layer; first electrically conductive portions arranged in the first trenches and covering the lateral flanks of said region over a second part of the thickness of the first layer, and forming first electrodes of the diodes of said region; at least one second trench partially passing through the first layer and separating the portions of the first layer from the diodes of said region.

Photo-emitting and/or photo-receiving diode array device

Photo-emitting and/or photo-receiving diode array device, comprising: a stack of first and second semiconductor layers doped according to different types; first trenches passing through the stack and surrounding a region of the stack wherein several diodes are formed; dielectric portions arranged in the first trenches and covering lateral flanks of said region over the entire thickness of the second layer and a first part of the thickness of the first layer; first electrically conductive portions arranged in the first trenches and covering the lateral flanks of said region over a second part of the thickness of the first layer, and forming first electrodes of the diodes of said region; at least one second trench partially passing through the first layer and separating the portions of the first layer from the diodes of said region.

Base member for light emitting device
11581458 · 2023-02-14 · ·

A base member for a light emitting device includes a bottom part and a frame part. The frame part has an upper surface, a lower surface, and a step portion. The frame part has a bonding surface bonded to the bottom part, and defining a planar surface of the step portion at a lower surface side, first and second inner surfaces, a first planar surface defining a planar surface of the step portion at an upper surface side, and first and second electrode layers electrically connected to each other, the second electrode layer being disposed on the first planar surface while the first electrode layer being not disposed on the first planar surface. The step portion extends along an entire periphery of the frame part in a bottom view, and the step portion does not extend along the entire periphery of the frame part in a top view.