A manufacturing method for an integrated chip is used for forming and processing an electrode structure of the integrated chip. The method includes step S1 and step S2. In step S1, a light-emitting portion is manufactured, and the light-emitting portion includes multiple light-emitting unit groups distributed in the form of a matrix. In step S2, conductive terminals multiple first electrodes and conductive terminals of multiple second electrodes of the light-emitting portion are electrically led out to form multiple first pin electrodes and multiple second pin electrodes. The first pin electrodes and the second pin electrodes are used for being electrically connected to a circuit substrate.

A method of fabricating radiation sensor dies includes forming a plurality of radiation-sensitive detector elements and a plurality of visible identifiers on at least some of the radiation-sensitive detector elements on a substrate, where each visible identifier is located in a different sub-region of the substrate containing a subset of the radiation-sensitive detector elements, and separating the sub-regions of the substrate from one another to provide a plurality of radiation sensor dies, where the visible identifier on each radiation sensor die uniquely identifies the radiation sensor die with respect to the other radiation sensor dies of the plurality of radiation sensor dies.

A multijunction solar cell including an upper first solar subcell having a first band gap and positioned for receiving an incoming light beam; a second solar subcell disposed below and adjacent to and lattice matched with said upper first solar subcell, and having a second band gap smaller than said first band gap; wherein the upper first solar subcell covers less than the entire upper surface of the second solar subcell, leaving an exposed portion of the second solar subcell around the periphery of the multijunction solar sell that lies in the path of the incoming light beam.

A semiconductor package using a coreless signal distribution structure (CSDS) is disclosed and may include a CSDS comprising at least one dielectric layer, at least one conductive layer, a first surface, and a second surface opposite to the first surface. The semiconductor package may also include a first semiconductor die having a first bond pad on a first die surface, where the first semiconductor die is bonded to the first surface of the CSDS via the first bond pad, and a second semiconductor die having a second bond pad on a second die surface, where the second semiconductor die is bonded to the second surface of the CSDS via the second bond pad. The semiconductor package may further include a metal post electrically coupled to the first surface of the CSDS, and a first encapsulant material encapsulating side surfaces and a surface opposite the first die surface of the first semiconductor die, the metal post, and a portion of the first surface of the CSDS.

Provided is a laser mark printing method and a method of producing a laser-marked silicon wafer that can reduce the machining strain left around dots constituting a laser mark. In a method of printing a laser mark having a plurality of dots on a silicon wafer, the plurality of dots are formed using laser light having a wavelength in the ultraviolet region.

A semiconductor package using a coreless signal distribution structure (CSDS) is disclosed and may include a CSDS comprising at least one dielectric layer, at least one conductive layer, a first surface, and a second surface opposite to the first surface. The semiconductor package may also include a first semiconductor die having a first bond pad on a first die surface, where the first semiconductor die is bonded to the first surface of the CSDS via the first bond pad, and a second semiconductor die having a second bond pad on a second die surface, where the second semiconductor die is bonded to the second surface of the CSDS via the second bond pad. The semiconductor package may further include a metal post electrically coupled to the first surface of the CSDS, and a first encapsulant material encapsulating side surfaces and a surface opposite the first die surface of the first semiconductor die, the metal post, and a portion of the first surface of the CSDS.

A semiconductor package includes: an encapsulation layer sealing at least one semiconductor chip; a redistribution level layer arranged on the encapsulation layer; a laser mark metal layer arranged on the redistribution level layer; and a laser mark arranged inside the laser mark metal layer. The laser mark includes letters, numbers, figures, symbols, and recognition codes indicating various pieces of information of the semiconductor package.

A method of marking information on a substrate for use in a semiconductor component is provided. The method comprises providing a substrate for use in a semiconductor component, providing a metal layer on a surface of the substrate, and providing a marking within the metal layer. A method of making a die, a radio-frequency module and a wireless mobile device; as well as a substrate, a die, a radio-frequency module and a wireless mobile device is also provided.

A substrate is disclosed. The substrate includes a transparent underlayer, a plurality of signal lines on the transparent underlayer, and a plurality of labels on the transparent underlayer. The plurality of labels respectively correspond to the plurality of signal lines in a one-to-one relationship and are configured to identify the corresponding signal lines, and one of at least two adjacent labels is a forward pattern label, and another one of the at least two adjacent labels is a reverse pattern label.

Product management and/or prompt defect analysis of a semiconductor device may be carried out without reducing the throughput in assembly and testing. Unique identification information is attached to a plurality of substrates (lead frames) used in manufacturing a semiconductor device (QFP) and to a transport unit for transporting a plurality of substrates, respectively. Identification information (rack ID) of the transport unit and identification information (substrate ID) of the substrate stored into the transport unit are associated with each other. The substrate is taken out from the transport unit set to a loader unit of each manufacturing apparatus and supplied to a processing unit, of the apparatus and in storing the substrate, the processing of which is complete, into a transport unit of an unloader unit of the apparatus, an association between identification information of the transport unit and the identification information of the substrate is checked.