Disclosed is a semiconductor device including a conductive pattern on a substrate, a passivation layer on the substrate and including an opening that partially exposes the conductive pattern, and a pad structure in the opening of the passivation layer and connected to the conductive pattern. The pad structure includes a first metal layer that fills the opening of the passivation layer and has a width greater than that of the opening, and a second metal layer on the first metal layer. The first metal layer has a first thickness at an outer wall of the first metal layer, a second thickness on a top surface of the passivation layer, and a third thickness on a top surface of the conductive pattern. The second thickness is greater than the first thickness, and the third thickness is greater than the second thickness.

An integrated circuit structure includes a substrate, a metal pad, a first passivation layer, a second passivation layer, and a conductive bump. The metal pad is over the substrate. The metal pad includes a probing portion and a bumping portion laterally connected to the probing region. The first passivation layer is over the metal pad. The second passivation layer is over the first passivation layer and has an opening. The bumping portion is in the opening. The conductive bump is in the opening of the second passivation layer and contacts the probing portion. The probing portion and the conductive bump are separated by the first passivation layer.

An integrated circuit structure includes a substrate, a metal pad, a first passivation layer, a second passivation layer, and a conductive bump. The metal pad is over the substrate. The metal pad includes a probing portion and a bumping portion laterally connected to the probing region. The first passivation layer is over the metal pad. The second passivation layer is over the first passivation layer and has an opening. The bumping portion is in the opening. The conductive bump is in the opening of the second passivation layer and contacts the probing portion. The probing portion and the conductive bump are separated by the first passivation layer.

Disclosed is a semiconductor device including a conductive pattern on a substrate, a passivation layer on the substrate and including an opening that partially exposes the conductive pattern, and a pad structure in the opening of the passivation layer and connected to the conductive pattern. The pad structure includes a first metal layer that fills the opening of the passivation layer and has a width greater than that of the opening, and a second metal layer on the first metal layer. The first metal layer has a first thickness at an outer wall of the first metal layer, a second thickness on a top surface of the passivation layer, and a third thickness on a top surface of the conductive pattern. The second thickness is greater than the first thickness, and the third thickness is greater than the second thickness.

Disclosed is a semiconductor device including a conductive pattern on a substrate, a passivation layer on the substrate and including an opening that partially exposes the conductive pattern, and a pad structure in the opening of the passivation layer and connected to the conductive pattern. The pad structure includes a first metal layer that fills the opening of the passivation layer and has a width greater than that of the opening, and a second metal layer on the first metal layer. The first metal layer has a first thickness at an outer wall of the first metal layer, a second thickness on a top surface of the passivation layer, and a third thickness on a top surface of the conductive pattern. The second thickness is greater than the first thickness, and the third thickness is greater than the second thickness.

An integrated circuit structure includes a substrate, a metal pad, a first passivation layer, a second passivation layer, and a conductive bump. The metal pad is over the substrate. The metal pad includes a probing portion and a bumping portion laterally connected to the probing region. The first passivation layer is over the metal pad. The second passivation layer is over the first passivation layer and has an opening. The bumping portion is in the opening. The conductive bump is in the opening of the second passivation layer and contacts the probing portion. The probing portion and the conductive bump are separated by the first passivation layer.

An integrated circuit structure includes a substrate, a metal pad, a first passivation layer, a second passivation layer, and a conductive bump. The metal pad is over the substrate. The metal pad includes a probing portion and a bumping portion laterally connected to the probing region. The first passivation layer is over the metal pad. The second passivation layer is over the first passivation layer and has an opening. The bumping portion is in the opening. The conductive bump is in the opening of the second passivation layer and contacts the probing portion. The probing portion and the conductive bump are separated by the first passivation layer.

A light-emitting device includes: a light-emitting element including a first surface provided as a light extraction surface, a second surface opposite to the first surface, a plurality of third surfaces between the first surface and the second surface, and a positive electrode and a negative electrode at the second surface; a light-transmissive member disposed at the first surface; and a bonding member disposed between the light-emitting element and the light-transmissive member and covering from the first surface to the plurality of third surfaces of the light-emitting element to bond the light-emitting element and the light-transmissive member. The bonding member is made of a resin that contains nanoparticles. The nanoparticles have a particle diameter of 1 nm or more and 30 nm or less and a content of 10 mass % or more and 20 mass % or less.

A light-emitting device includes: a light-emitting element including a first surface provided as a light extraction surface, a second surface opposite to the first surface, a plurality of third surfaces between the first surface and the second surface, and a positive electrode and a negative electrode at the second surface; a light-transmissive member disposed at the first surface; and a bonding member disposed between the light-emitting element and the light-transmissive member and covering from the first surface to the plurality of third surfaces of the light-emitting element to bond the light-emitting element and the light-transmissive member. The bonding member is made of a resin that contains nanoparticles. The nanoparticles have a particle diameter of 1 nm or more and 30 nm or less and a content of 10 mass % or more and 20 mass % or less.

A semiconductor device is disclosed including one or more semiconductor dies mounted on substrate. Each semiconductor die may be formed with a ferromagnetic layer on a lower, inactive surface of the semiconductor die. The ferromagnetic layer pulls the semiconductor dies down against each other and the substrate during fabrication to prevent warping of the dies. The ferromagnetic layer also balances out a mismatch of coefficients of thermal expansion between layers of the dies, thus further preventing warping of the dies.