Patent classifications
H01L2924/01078
SEMICONDUCTOR PACKAGE
A semiconductor package including a first substrate including a first bump pad and a filling compensation film (FCF) around the first bump pad; a second substrate facing the first substrate and including a second bump pad; a bump structure (BS) in contact with the first bump pad and the second bump pad; and a non-conductive film (NCF) surrounding the BS and between the first substrate and the second substrate, wherein the NCF covers an upper surface and an edge of the FCF.
SEMICONDUCTOR PACKAGE
A semiconductor package including a first substrate including a first bump pad and a filling compensation film (FCF) around the first bump pad; a second substrate facing the first substrate and including a second bump pad; a bump structure (BS) in contact with the first bump pad and the second bump pad; and a non-conductive film (NCF) surrounding the BS and between the first substrate and the second substrate, wherein the NCF covers an upper surface and an edge of the FCF.
ELECTRO-OXIDATIVE METAL REMOVAL ACCOMPANIED BY PARTICLE CONTAMINATION MITIGATION IN SEMICONDUCTOR PROCESSING
During electro-oxidative metal removal on a semiconductor substrate, the substrate having a metal layer is anodically biased and the metal is electrochemically dissolved into an electrolyte. Metal particles (e.g., copper particles when the dissolved metal is copper) can inadvertently form on the surface of the substrate during electrochemical metal removal and cause defects during subsequent semiconductor processing. Contamination with such particles can be mitigated by preventing particle formation and/or by dissolution of particles. In one implementation, mitigation involves using an electrolyte that includes an oxidizer, such as hydrogen peroxide, during the electrochemical metal removal. An electrochemical metal removal apparatus in one embodiment has a conduit for introducing an oxidizer to the electrolyte and a sensor for monitoring the concentration of the oxidizer in the electrolyte.
ELECTRO-OXIDATIVE METAL REMOVAL ACCOMPANIED BY PARTICLE CONTAMINATION MITIGATION IN SEMICONDUCTOR PROCESSING
During electro-oxidative metal removal on a semiconductor substrate, the substrate having a metal layer is anodically biased and the metal is electrochemically dissolved into an electrolyte. Metal particles (e.g., copper particles when the dissolved metal is copper) can inadvertently form on the surface of the substrate during electrochemical metal removal and cause defects during subsequent semiconductor processing. Contamination with such particles can be mitigated by preventing particle formation and/or by dissolution of particles. In one implementation, mitigation involves using an electrolyte that includes an oxidizer, such as hydrogen peroxide, during the electrochemical metal removal. An electrochemical metal removal apparatus in one embodiment has a conduit for introducing an oxidizer to the electrolyte and a sensor for monitoring the concentration of the oxidizer in the electrolyte.
COPPER ALLOY BONDING WIRE FOR SEMICONDUCTOR DEVICES
In a copper alloy bonding wire for semiconductor devices, the bonding longevity of a ball bonded part under high-temperature and high-humidity environments is improved. The copper alloy bonding wire for semiconductor devices includes in total 0.03% by mass or more to 3% by mass or less of at least one or more kinds of elements selected from Ni, Zn, Ga, Ge, Rh, In, Ir, and Pt (first element), with the balance Cu and inevitable impurities. The inclusion of a predetermined amount of the first element suppresses production of an intermetallic compound susceptible to corrosion under high-temperature and high-humidity environments at the wire bonding interface and improves the bonding longevity of a ball bonded part.
COPPER ALLOY BONDING WIRE FOR SEMICONDUCTOR DEVICES
In a copper alloy bonding wire for semiconductor devices, the bonding longevity of a ball bonded part under high-temperature and high-humidity environments is improved. The copper alloy bonding wire for semiconductor devices includes in total 0.03% by mass or more to 3% by mass or less of at least one or more kinds of elements selected from Ni, Zn, Ga, Ge, Rh, In, Ir, and Pt (first element), with the balance Cu and inevitable impurities. The inclusion of a predetermined amount of the first element suppresses production of an intermetallic compound susceptible to corrosion under high-temperature and high-humidity environments at the wire bonding interface and improves the bonding longevity of a ball bonded part.
3D SEMICONDUCTOR MEMORY DEVICE AND STRUCTURE
A 3D semiconductor device including: a first single crystal layer with first transistors; overlaid by a first metal layer; a second metal layer overlaying the first metal layer and being overlaid by a third metal layer; a logic gates including at least the first metal layer interconnecting the first transistors; second transistors disposed atop the third metal layer; third transistors disposed atop the second transistors; a top metal layer disposed atop the third transistors; and a memory array including word-lines, and at least four memory mini arrays, where each of the memory mini arrays includes at least four rows by four columns of memory cells, where each of the memory cells includes at least one of the second transistors or third transistors, sense amplifier circuit(s) for each of the memory mini arrays, the second metal layer provides a greater current carrying capacity than the third metal layer.
Methods for attachment and devices produced using the methods
Methods for attachment and devices produced using such methods are disclosed. In certain examples, the method comprises disposing a capped nanomaterial on a substrate, disposing a die on the disposed capped nanomaterial, drying the disposed capped nanomaterial and the disposed die, and sintering the dried disposed die and the dried capped nanomaterial at a temperature of 300° C. or less to attach the die to the substrate. Devices produced using the methods are also described.
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING INTERLAYER INSULATING FILMS HAVING DIFFERENT YOUNGS MODULUS
A preferred aim of the invention is to provide technique for improving reliability of semiconductor devices when using a low-dielectric-constant film having a lower dielectric constant than a silicon oxide film to a part of an interlayer insulating film. More specifically, to achieve the preferred aim, an interlayer insulating film IL1 forming a first fine layer is formed of a middle-Young's-modulus film, and thus it is possible to separate an integrated high-Young's-modulus layer (a semiconductor substrate 1S and a contact interlayer insulating film CIL) and an interlayer insulating film (a low-Young's-modulus film; a low-dielectric-constant film) IL2 forming a second fine layer not to let them directly contact with each other, and stress can be diverged. As a result, film exfoliation of the interlayer insulating film IL2 formed of a low-Young's-modulus film can be prevented and thus reliability of semiconductor devices can be improved.
Single-package wireless communication device
A method, apparatus and system with an autonomic, self-healing polymer capable of slowing crack propagation within the polymer and slowing delamination at a material interface.