H01L2924/01201

Stacked die assembly including double-sided inter-die bonding connections and methods of forming the same

Multiple bonded units are provided, each of which includes a respective front-side die and a backside die. The two dies in each bonded unit may be a memory die and a logic die configured to control operation of memory elements in the memory die. Alternatively, the two dies may be memory dies. The multiple bonded units can be attached such that front-side external bonding pads have physically exposed surfaces that face upward and backside external bonding pads of each bonded unit have physically exposed surfaces that face downward. A first set of bonding wires can connect a respective pair of front-side external bonding pads, and a second set of bonding wires can connect a respective pair of backside external bonding pads.

Stacked die assembly including double-sided inter-die bonding connections and methods of forming the same

Multiple bonded units are provided, each of which includes a respective front-side die and a backside die. The two dies in each bonded unit may be a memory die and a logic die configured to control operation of memory elements in the memory die. Alternatively, the two dies may be memory dies. The multiple bonded units can be attached such that front-side external bonding pads have physically exposed surfaces that face upward and backside external bonding pads of each bonded unit have physically exposed surfaces that face downward. A first set of bonding wires can connect a respective pair of front-side external bonding pads, and a second set of bonding wires can connect a respective pair of backside external bonding pads.

BONDED ASSEMBLY FORMED BY HYBRID WAFER BONDING USING SELECTIVELY DEPOSITED METAL LINERS
20220149002 · 2022-05-12 ·

A nucleation suppression layer including a self-assembly material can be formed on a surface of a bonding dielectric layer without depositing the self-assembly material on physically exposed surfaces of first metal bonding pads of a first semiconductor die. Metallic liners including a second metal can be formed on the physically exposed surfaces of the metal bonding pads without depositing the second metal on the nucleation suppression layer. The first semiconductor die is bonded to a second semiconductor die by inducing metal-to-metal bonding between mating pairs of the first metal bonding pads and second metal bonding pads of the second semiconductor die.

BONDED ASSEMBLY FORMED BY HYBRID WAFER BONDING USING SELECTIVELY DEPOSITED METAL LINERS
20220149002 · 2022-05-12 ·

A nucleation suppression layer including a self-assembly material can be formed on a surface of a bonding dielectric layer without depositing the self-assembly material on physically exposed surfaces of first metal bonding pads of a first semiconductor die. Metallic liners including a second metal can be formed on the physically exposed surfaces of the metal bonding pads without depositing the second metal on the nucleation suppression layer. The first semiconductor die is bonded to a second semiconductor die by inducing metal-to-metal bonding between mating pairs of the first metal bonding pads and second metal bonding pads of the second semiconductor die.

Die bonding material, light-emitting device, and method for producing light-emitting device

The present invention provides a die bonding material containing the following component (A) and a solvent and having a refractive index (nD) at 25° C. of 1.41 to 1.43 and a thixotropic index of 2 or more, a light-emitting device including an adhesive member derived from the die bonding material, and a method for producing the light-emitting device. The die bonding material of the present invention is preferably used for fixing a light emitting element at a predetermined position. Component (A): a curable polysilsesquioxane compound having a repeating unit represented by the following formula (a-1) and satisfying predetermined requirements related to .sup.29Si-NMR and mass average molecular weight (Mw)
R.sup.1-D-SiO.sub.3/2  (a-1) [wherein R.sup.1 represents a fluoroalkyl group represented by a compositional formula: C.sub.mH.sub.(2m−n+1)F.sub.n; m represents an integer of 1 to 10, and n represents an integer of 2 to (2m+1); and D represents a linking group (excluding an alkylene group) for connecting R.sup.1 and Si, or a single bond].

Die bonding material, light-emitting device, and method for producing light-emitting device

The present invention provides a die bonding material containing the following component (A) and a solvent and having a refractive index (nD) at 25° C. of 1.41 to 1.43 and a thixotropic index of 2 or more, a light-emitting device including an adhesive member derived from the die bonding material, and a method for producing the light-emitting device. The die bonding material of the present invention is preferably used for fixing a light emitting element at a predetermined position. Component (A): a curable polysilsesquioxane compound having a repeating unit represented by the following formula (a-1) and satisfying predetermined requirements related to .sup.29Si-NMR and mass average molecular weight (Mw)
R.sup.1-D-SiO.sub.3/2  (a-1) [wherein R.sup.1 represents a fluoroalkyl group represented by a compositional formula: C.sub.mH.sub.(2m−n+1)F.sub.n; m represents an integer of 1 to 10, and n represents an integer of 2 to (2m+1); and D represents a linking group (excluding an alkylene group) for connecting R.sup.1 and Si, or a single bond].

Semiconductor device including bonding pad metal layer structure

A semiconductor device is proposed. The semiconductor device includes a wiring metal layer structure. The semiconductor device further includes a dielectric layer structure arranged directly on the wiring metal layer structure. The semiconductor device further includes a bonding pad metal layer structure arranged, at least partly, directly on the dielectric layer structure. A layer thickness of the dielectric layer structure ranges from 1% to 30% of a layer thickness of the wiring metal layer structure. The wiring metal layer structure and the bonding pad metal structure are electrically connected through openings in the dielectric layer structure.

Semiconductor device including bonding pad metal layer structure

A semiconductor device is proposed. The semiconductor device includes a wiring metal layer structure. The semiconductor device further includes a dielectric layer structure arranged directly on the wiring metal layer structure. The semiconductor device further includes a bonding pad metal layer structure arranged, at least partly, directly on the dielectric layer structure. A layer thickness of the dielectric layer structure ranges from 1% to 30% of a layer thickness of the wiring metal layer structure. The wiring metal layer structure and the bonding pad metal structure are electrically connected through openings in the dielectric layer structure.

Electronic substrates having embedded dielectric magnetic material to form inductors

An inductor may be fabricated comprising a magnetic material layer and an electrically conductive via or trace extending through the magnetic material layer, wherein the magnetic material layer comprises dielectric magnetic filler particles within a carrier material. Further embodiments may include incorporating the inductor of the present description into an electronic substrate and may further include an integrated circuit device attached to the electronic substrate and the electronic substrate may further be attached to a board, such as a motherboard.

Electronic substrates having embedded dielectric magnetic material to form inductors

An inductor may be fabricated comprising a magnetic material layer and an electrically conductive via or trace extending through the magnetic material layer, wherein the magnetic material layer comprises dielectric magnetic filler particles within a carrier material. Further embodiments may include incorporating the inductor of the present description into an electronic substrate and may further include an integrated circuit device attached to the electronic substrate and the electronic substrate may further be attached to a board, such as a motherboard.