A semiconductor power device may include a Silicon Carbide (SiC) layer having an active power device formed on a first surface thereof. An Ohmic contact layer may be formed on a second, opposing surface of the SiC layer, the Ohmic contact layer including Nickel Silicide (NiSix) with a first silicide region containing a first precipitate of non-reacted carbon disposed between the SiC layer and a second silicide region. The second silicide region may be disposed between the first silicide region and a third silicide region, and may include a mixture of a first precipitate of refractory metal carbide and a second precipitate of non-reacted carbon. The third silicide region may contain a second precipitate of refractory metal carbide. A solder metal layer may be formed on the Ohmic contact layer, with the third silicide region disposed between the second silicide region and the solder metal layer.

A semiconductor power device may include a Silicon Carbide (SiC) layer having an active power device formed on a first surface thereof. An Ohmic contact layer may be formed on a second, opposing surface of the SiC layer, the Ohmic contact layer including Nickel Silicide (NiSix) with a first silicide region containing a first precipitate of non-reacted carbon disposed between the SiC layer and a second silicide region. The second silicide region may be disposed between the first silicide region and a third silicide region, and may include a mixture of a first precipitate of refractory metal carbide and a second precipitate of non-reacted carbon. The third silicide region may contain a second precipitate of refractory metal carbide. A solder metal layer may be formed on the Ohmic contact layer, with the third silicide region disposed between the second silicide region and the solder metal layer.

The present application discloses a method for fabricating a semiconductor device with slanted conductive layers. The method for fabricating a semiconductor device includes providing a substrate, forming a first insulating layer above the substrate, forming first slanted recesses along the first insulating layer, and forming first slanted conductive layers in the first slanted recesses and a top conductive layer covering the first slanted conductive layers.

The present application discloses a method for fabricating a semiconductor device with slanted conductive layers. The method for fabricating a semiconductor device includes providing a substrate, forming a first insulating layer above the substrate, forming first slanted recesses along the first insulating layer, and forming first slanted conductive layers in the first slanted recesses and a top conductive layer covering the first slanted conductive layers.

A semiconductor device includes a silicon carbide layer, a metal carbide layer arranged over the silicon carbide layer, and a solder layer arranged over and in contact with the metal carbide layer.

A semiconductor device includes: a mounting member having an electrode; a conductive member facing the electrode; and a bonding member electrically and mechanically connecting the electrode and the conductive member. The bonding member is made of a sintered body in which an additive particle including a metal atom having aggregation energy higher than a silver atom is added to an silver particle.

A semiconductor device includes: a mounting member having an electrode; a conductive member facing the electrode; and a bonding member electrically and mechanically connecting the electrode and the conductive member. The bonding member is made of a sintered body in which an additive particle including a metal atom having aggregation energy higher than a silver atom is added to an silver particle.

A biosensor package structure is provided. The biosensor package structure includes a protection layer and a redistribution layer disposed over the protection layer. The protection layer has a plurality of openings exposing the redistribution layer. The biosensor package structure includes at least one die disposed over the protection layer and the redistribution layer, a plurality of pads disposed on a lower surface of the die, and a plurality of vias disposed between the pads and the redistribution layer. The biosensor package structure includes a dielectric material disposed over the protection layer and the redistribution layer and adjacent to the die, pads and vias. The biosensor package structure further includes at least one biosensing region at the top portion of the die. The top surfaces of the pads are disposed at a level that is lower than the top surface of the biosensing region and higher than the bottom surface of the die.

A biosensor package structure is provided. The biosensor package structure includes a protection layer and a redistribution layer disposed over the protection layer. The protection layer has a plurality of openings exposing the redistribution layer. The biosensor package structure includes at least one die disposed over the protection layer and the redistribution layer, a plurality of pads disposed on a lower surface of the die, and a plurality of vias disposed between the pads and the redistribution layer. The biosensor package structure includes a dielectric material disposed over the protection layer and the redistribution layer and adjacent to the die, pads and vias. The biosensor package structure further includes at least one biosensing region at the top portion of the die. The top surfaces of the pads are disposed at a level that is lower than the top surface of the biosensing region and higher than the bottom surface of the die.

A method of forming a microelectronic device structure comprises coiling a portion of a wire up and around at least one sidewall of a structure protruding from a substrate. At least one interface between an upper region of the structure and an upper region of the coiled portion of the wire is welded to form a fused region between the structure and the wire.