H01L2924/0483

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
20180211930 · 2018-07-26 · ·

A method of manufacturing a semiconductor device including: bonding a wire constituted of copper on an electrode pad provided on a surface of a semiconductor substrate, wherein the electrode pad includes a hard metal layer harder than the wire as a surface layer of the electrode pad, a recess is provided in a surface of the hard metal layer, the wire before the bonding includes a linear portion and a ball portion provided at a distal end of the linear portion and having a diameter larger than a diameter of the linear portion, and the ball portion is bonded in the recess in the bonding.

Vertically integrated wafers with thermal dissipation
09812428 · 2017-11-07 · ·

Technologies are generally described related to three-dimensional integration of integrated circuits (ICs) with spacing for heat dissipation. According to some examples, a self-aligned silicide may be formed in a temporary silicon layer and removed subsequent to bonding of the wafers to achieve improved contact between the combined ICs and enhanced heat dissipation through added spacing between the ICs.

VERTICALLY INTEGRATED WAFERS WITH THERMAL DISSIPATION
20170040295 · 2017-02-09 · ·

Technologies are generally described related to three-dimensional integration of integrated circuits (ICs) with spacing for heat dissipation. According to some examples, a self-aligned silicide may be formed in a temporary silicon layer and removed subsequent to bonding of the wafers to achieve improved contact between the combined ICs and enhanced heat dissipation through added spacing between the ICs.

Semiconductor device
09553067 · 2017-01-24 · ·

A semiconductor device includes a semiconductor layer, an electrode layer arranged on the semiconductor layer, a crack starting point layer arranged above the semiconductor layer, and a solder layer being in contact with the electrode layer and the crack starting point layer. A joining force between the solder layer and the crack starting point layer is smaller than a joining force between the solder layer and the electrode layer.