Patent classifications
H01L2924/0494
Systems and methods for bonding semiconductor elements
A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element; and (b) ultrasonically bonding ones of the first conductive structures to respective ones of the second conductive structures. A bonding surface of at least one of the first conductive structures and the second conductive structures includes a frangible coating.
Methods of forming a microelectronic device structure, and related microelectronic device structures and microelectronic devices
A method of forming a microelectronic device structure comprises coiling a portion of a wire up and around at least one sidewall of a structure protruding from a substrate. At least one interface between an upper region of the structure and an upper region of the coiled portion of the wire is welded to form a fused region between the structure and the wire.
Methods of forming a microelectronic device structure, and related microelectronic device structures and microelectronic devices
A method of forming a microelectronic device structure comprises coiling a portion of a wire up and around at least one sidewall of a structure protruding from a substrate. At least one interface between an upper region of the structure and an upper region of the coiled portion of the wire is welded to form a fused region between the structure and the wire.
SYSTEMS AND METHODS FOR BONDING SEMICONDUCTOR ELEMENTS
A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element; and (b) ultrasonically bonding ones of the first conductive structures to respective ones of the second conductive structures. A bonding surface of at least one of the first conductive structures and the second conductive structures includes a frangible coating.
SYSTEMS AND METHODS FOR BONDING SEMICONDUCTOR ELEMENTS
A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element; and (b) ultrasonically bonding ones of the first conductive structures to respective ones of the second conductive structures. A bonding surface of at least one of the first conductive structures and the second conductive structures includes a frangible coating.
METHODS OF FORMING A MICROELECTRONIC DEVICE STRUCTURE, AND RELATED MICROELECTRONIC DEVICE STRUCTURES AND MICROELECTRONIC DEVICES
A method of forming a microelectronic device structure comprises coiling a portion of a wire up and around at least one sidewall of a structure protruding from a substrate. At least one interface between an upper region of the structure and an upper region of the coiled portion of the wire is welded to form a fused region between the structure and the wire.
METHODS OF FORMING A MICROELECTRONIC DEVICE STRUCTURE, AND RELATED MICROELECTRONIC DEVICE STRUCTURES AND MICROELECTRONIC DEVICES
A method of forming a microelectronic device structure comprises coiling a portion of a wire up and around at least one sidewall of a structure protruding from a substrate. At least one interface between an upper region of the structure and an upper region of the coiled portion of the wire is welded to form a fused region between the structure and the wire.
SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME
A semiconductor package includes a photonic integrated circuit (PIC) die having a photonic layer, and an electronic integrated circuit (EIC) die bonded to the PIC die. The EIC die includes an optical region that allows the transmission of optical signals through the optical region towards the photonic layer, and a peripheral region outside of the optical region. The optical region includes optical concave/convex structures, a protection film and optically transparent material layers. The optical concave/convex structures are formed in the semiconductor structure. The protection film is conformally disposed over the optical concave/convex structures. The optically transparent material layers are disposed over the protection film and filling up the optical region. The peripheral region includes first bonding pads bonded to the photonic integrated circuit die, and via structures connected to the first bonding pads, wherein the protection film is laterally surrounding sidewalls of the via structures.