The disclosed technology generally relates to semiconductor wafer bonding, and more particularly to direct bonding by contacting surfaces of the semiconductor wafers. In one aspect, a method for bonding a first semiconductor substrate to a second semiconductor substrate by direct bonding is described. The substrates are both provided on their contact surfaces with a dielectric layer, followed by a CMP step for reducing the roughness of the dielectric layer. Then a layer of SiCN is deposited onto the dielectric layer, followed by a CMP step which reduces the roughness of the SiCN layer to the order of 1 tenth of a nanometer. Then the substrates are subjected to a pre-bond annealing step and then bonded by direct bonding, possibly preceded by one or more pre-treatments of the contact surfaces, and followed by a post-bond annealing step, at a temperature of less than or equal to 250° C. It has been found that the bond strength is excellent, even at the above named annealing temperatures, which are lower than presently known in the art.

The disclosed technology generally relates to semiconductor wafer bonding, and more particularly to direct bonding by contacting surfaces of the semiconductor wafers. In one aspect, a method for bonding a first semiconductor substrate to a second semiconductor substrate by direct bonding is described. The substrates are both provided on their contact surfaces with a dielectric layer, followed by a CMP step for reducing the roughness of the dielectric layer. Then a layer of SiCN is deposited onto the dielectric layer, followed by a CMP step which reduces the roughness of the SiCN layer to the order of 1 tenth of a nanometer. Then the substrates are subjected to a pre-bond annealing step and then bonded by direct bonding, possibly preceded by one or more pre-treatments of the contact surfaces, and followed by a post-bond annealing step, at a temperature of less than or equal to 250° C. It has been found that the bond strength is excellent, even at the above named annealing temperatures, which are lower than presently known in the art.

The present invention relates to a conductive composition containing a conductive metal powder and a resin component, in which the conductive metal powder contains at least a metal flake having a crystalline structure in which a metal crystal grows in a flake shape, and the resin component contains an aromatic amine skeleton.

The present invention relates to a conductive composition containing a conductive metal powder and a resin component, in which the conductive metal powder contains at least a metal flake having a crystalline structure in which a metal crystal grows in a flake shape, and the resin component contains an aromatic amine skeleton.

A method of forming a semiconductor structure, including steps of providing a first substrate, and forming a first bonding layer on a surface of the first substrate, wherein a material of the first bonding layer includes dielectric material of silicon, nitrogen and carbon.

A method of forming a semiconductor structure, including steps of providing a first substrate, and forming a first bonding layer on a surface of the first substrate, wherein a material of the first bonding layer includes dielectric material of silicon, nitrogen and carbon.

A method of forming a microelectronic device comprises forming a microelectronic device structure comprising a base structure, a doped semiconductive structure comprising a first portion overlying the base structure and second portions vertically extending from the first portion and into the base structure, a stack structure overlying the doped semiconductive structure, cell pillar structures vertically extending through the stack structure and to the doped semiconductive structure, and digit line structures vertically overlying the stack structure. An additional microelectronic device structure comprising control logic devices is formed. The microelectronic device structure is attached to the additional microelectronic device structure to form a microelectronic device structure assembly. The carrier structure and the second portions of the doped semiconductive structure are removed. The first portion of the doped semiconductive structure is then patterned to form at least one source structure coupled to the cell pillar structures. Devices and systems are also described.

A method of forming a microelectronic device comprises forming a microelectronic device structure comprising a base structure, a doped semiconductive structure comprising a first portion overlying the base structure and second portions vertically extending from the first portion and into the base structure, a stack structure overlying the doped semiconductive structure, cell pillar structures vertically extending through the stack structure and to the doped semiconductive structure, and digit line structures vertically overlying the stack structure. An additional microelectronic device structure comprising control logic devices is formed. The microelectronic device structure is attached to the additional microelectronic device structure to form a microelectronic device structure assembly. The carrier structure and the second portions of the doped semiconductive structure are removed. The first portion of the doped semiconductive structure is then patterned to form at least one source structure coupled to the cell pillar structures. Devices and systems are also described.

A method of forming a microelectronic device comprises forming a microelectronic device structure comprising a base structure, a doped semiconductive material overlying the base structure, a stack structure overlying the doped semiconductive material, cell pillar structures vertically extending through the stack structure and the doped semiconductive material and into the base structure, and digit line structures vertically overlying the stack structure. An additional microelectronic device structure comprising control logic devices is formed. The microelectronic device structure is attached to the additional microelectronic device structure to form a microelectronic device structure assembly. The base structure and portions of the cell pillar structures vertically extending into the base structure to are removed to expose the doped semiconductive material. The doped semiconductive material is then patterned to form at least one source structure over the stack structure and coupled to the cell pillar structures. Microelectronic devices and electronic systems are also described.

A method of forming a microelectronic device comprises forming a microelectronic device structure comprising a base structure, a doped semiconductive material overlying the base structure, a stack structure overlying the doped semiconductive material, cell pillar structures vertically extending through the stack structure and the doped semiconductive material and into the base structure, and digit line structures vertically overlying the stack structure. An additional microelectronic device structure comprising control logic devices is formed. The microelectronic device structure is attached to the additional microelectronic device structure to form a microelectronic device structure assembly. The base structure and portions of the cell pillar structures vertically extending into the base structure to are removed to expose the doped semiconductive material. The doped semiconductive material is then patterned to form at least one source structure over the stack structure and coupled to the cell pillar structures. Microelectronic devices and electronic systems are also described.