Patent classifications
H01L2924/0538
INTEGRATED CIRCUIT DEVICE HAVING REDISTRIBUTION PATTERN
An integrated circuit device includes a wiring structure, first and second inter-wiring insulating layers, redistributions patterns and a cover insulating layer. The wiring structure includes wiring layers having a multilayer wiring structure and via plugs. The first inter-wiring insulating layer that surrounds the wiring structure on a substrate. The second inter-wiring insulating layer is on the first inter-wiring insulating layer, and redistribution via plugs are connected to the wiring structure through the second inter-wiring insulating layer. The redistribution patterns includes pad patterns and dummy patterns on the second inter-wiring insulating layer. Each patterns has a thickness greater than a thickness of each wiring layer. The cover insulating layer covers some of the redistribution patterns. The dummy patterns are in the form of lines that extend in a horizontal direction parallel to the substrate.
LIGHT-EMITTING DEVICE PACKAGE AND LIGHTING MODULE
The light-emitting device package disclosed in the embodiment includes first and second frames; a body supporting the first and second frames; and a light emitting device on the second frame, and the body may include a lower surface, a first side, and a second side facing the first side. The first frame includes a first recess that is concave in a second side direction from a first side portion adjacent to the first side, and the second frame includes a second recess that is concave in a first side direction from a second side portion adjacent to the second side. The first side portion of the first frame includes plurality of protrusions exposed to the first side of the body, the first recess is disposed between the protrusions of the first side portion, the second side portion of the second frame includes plurality of protrusions exposed to the second side of the body, and the second recess is disposed between the protrusions of the second side portion. A first length in the second direction of the first and second recesses is longer than a width in the first direction, and the first length may be larger than the second length in the second direction, which is an interval between the protrusions disposed in each of the first and second frames.
LIGHT-EMITTING DEVICE PACKAGE AND LIGHTING MODULE
The light-emitting device package disclosed in the embodiment includes first and second frames; a body supporting the first and second frames; and a light emitting device on the second frame, and the body may include a lower surface, a first side, and a second side facing the first side. The first frame includes a first recess that is concave in a second side direction from a first side portion adjacent to the first side, and the second frame includes a second recess that is concave in a first side direction from a second side portion adjacent to the second side. The first side portion of the first frame includes plurality of protrusions exposed to the first side of the body, the first recess is disposed between the protrusions of the first side portion, the second side portion of the second frame includes plurality of protrusions exposed to the second side of the body, and the second recess is disposed between the protrusions of the second side portion. A first length in the second direction of the first and second recesses is longer than a width in the first direction, and the first length may be larger than the second length in the second direction, which is an interval between the protrusions disposed in each of the first and second frames.
LIGHT EMITTING DEVICE PACKAGE
A light emitting device package according to an embodiment may include a first package body including first and second openings passing through the upper surface and lower surface thereof; a second package body disposed on the first package body and including a third opening passing through the upper surface and lower surface thereof; a light emitting device disposed in the third opening; a first resin disposed between the upper surface of the first package body and the light emitting device; and a second resin disposed in the third opening. According to the embodiment, the upper surface of the first package body may be coupled to the lower surface of the second package body, the first package body may include a recess recessed from the upper surface of the first package body to the lower surface of the first package body, the first resin may be disposed in the recess, the first resin and the second resin include materials different from each other, and the first resin may be in contact with the light emitting device and the second resin.
LIGHT EMITTING DEVICE PACKAGE
A light emitting device package according to an embodiment may include a first package body including first and second openings passing through the upper surface and lower surface thereof; a second package body disposed on the first package body and including a third opening passing through the upper surface and lower surface thereof; a light emitting device disposed in the third opening; a first resin disposed between the upper surface of the first package body and the light emitting device; and a second resin disposed in the third opening. According to the embodiment, the upper surface of the first package body may be coupled to the lower surface of the second package body, the first package body may include a recess recessed from the upper surface of the first package body to the lower surface of the first package body, the first resin may be disposed in the recess, the first resin and the second resin include materials different from each other, and the first resin may be in contact with the light emitting device and the second resin.
Final passivation for wafer level warpage and ULK stress reduction
Embodiments are directed to a method of forming a semiconductor chip package and resulting structures having an annular PSPI region formed under a BLM pad. An annular region is formed under a barrier layer metallurgy (BLM) pad. The annular region includes a photosensitive polyimide (PSPI). A conductive pedestal is formed on a surface of the BLM pad and a solder bump is formed on a surface of the conductive pedestal. The annular PSPI region reduces wafer warpage and ULK peeling stress.
Final passivation for wafer level warpage and ULK stress reduction
Embodiments are directed to a method of forming a semiconductor chip package and resulting structures having an annular PSPI region formed under a BLM pad. An annular region is formed under a barrier layer metallurgy (BLM) pad. The annular region includes a photosensitive polyimide (PSPI). A conductive pedestal is formed on a surface of the BLM pad and a solder bump is formed on a surface of the conductive pedestal. The annular PSPI region reduces wafer warpage and ULK peeling stress.
PACKAGE STRUCTURE AND METHOD OF MANUFACTURING THE SAME
A package structure includes a semiconductor die and a redistribution circuit structure. The redistribution circuit structure is disposed on and electrically connected to the semiconductor die and includes a patterned conductive layer, a dielectric layer, and an inter-layer film. The dielectric layer is disposed on the patterned conductive layer. The inter-layer film is sandwiched between the dielectric layer and the patterned conductive layer, and the patterned conductive layer is separated from the dielectric layer through the inter-layer film.
SEMICONDUCTOR DEVICE HAVING BUMP STRUCTURES AND SEMICONDUCTOR PACKAGE HAVING THE SAME
A semiconductor device including a substrate including a first conductive pad on a first surface thereof, at least one first bump structure on the first conductive pad, the first bump structure including a first connecting member and a first delamination prevention layer, the first delamination prevention layer on the first connecting member and having a greater hardness than the first connecting member, and a first encapsulant above the first surface of the substrate and surrounding the first bump structure may be provided.
SEMICONDUCTOR DEVICE HAVING BUMP STRUCTURES AND SEMICONDUCTOR PACKAGE HAVING THE SAME
A semiconductor device including a substrate including a first conductive pad on a first surface thereof, at least one first bump structure on the first conductive pad, the first bump structure including a first connecting member and a first delamination prevention layer, the first delamination prevention layer on the first connecting member and having a greater hardness than the first connecting member, and a first encapsulant above the first surface of the substrate and surrounding the first bump structure may be provided.