A hybrid wafer bonding method includes providing a first semiconductor structure and providing a second semiconductor structure. The first semiconductor structure includes a first substrate, a first dielectric, and a first via structure. The first via structure includes a first contact via and first metal impurities doped in the first contact via. The second semiconductor structure includes a second substrate, a second dielectric layer, and a second via structure. The second via structure includes a second contact via and second metal impurities doped in the second contact via. The method further includes bonding the first semiconductor structure with the second semiconductor and forming a self-barrier layer by an alloying process. The self-barrier layer is formed by a multi-component oxide corresponding to the first and second metal impurities.

A hybrid wafer bonding method includes providing a first semiconductor structure and providing a second semiconductor structure. The first semiconductor structure includes a first substrate, a first dielectric, and a first via structure. The first via structure includes a first contact via and first metal impurities doped in the first contact via. The second semiconductor structure includes a second substrate, a second dielectric layer, and a second via structure. The second via structure includes a second contact via and second metal impurities doped in the second contact via. The method further includes bonding the first semiconductor structure with the second semiconductor and forming a self-barrier layer by an alloying process. The self-barrier layer is formed by a multi-component oxide corresponding to the first and second metal impurities.

A hybrid wafer bonding method includes providing a first semiconductor structure and providing a second semiconductor structure. The first semiconductor structure includes a first via structure in a first dielectric layer, the first via structure including a first contact via surface. The second semiconductor structure includes a second via structure in a second dielectric layer, the second via structure including a second contact via surface. The first contact via surface is bonded with the second contact via surface. A barrier structure is formed surrounding the second contact via surface along a lateral direction and extending into each of the first contact via surface and the second dielectric layer in a vertical direction. The first via structure includes first metal impurities doped in a bulk region of the first via structure, and the second via structure includes second metal impurities doped in a bulk region of the second via structure.

A hybrid wafer bonding method includes providing a first semiconductor structure and providing a second semiconductor structure. The first semiconductor structure includes a first via structure in a first dielectric layer, the first via structure including a first contact via surface. The second semiconductor structure includes a second via structure in a second dielectric layer, the second via structure including a second contact via surface. The first contact via surface is bonded with the second contact via surface. A barrier structure is formed surrounding the second contact via surface along a lateral direction and extending into each of the first contact via surface and the second dielectric layer in a vertical direction. The first via structure includes first metal impurities doped in a bulk region of the first via structure, and the second via structure includes second metal impurities doped in a bulk region of the second via structure.

A bonding member (10) includes surface-processed silver surfaces (11a, 11b).

A bonding member (10) includes surface-processed silver surfaces (11a, 11b).

A manufacturing method of an electronic-component-mounted module includes a step of forming a laminate of: a ceramic substrate board, a circuit layer made of aluminum or aluminum alloy on the ceramic substrate board, a first silver paste layer between the circuit layer and one surface of an electronic component, the electronic component, a lead frame made of copper or copper alloy, and a second silver paste layer between the other surface of the electronic component and the lead frame; and a step of batch-bonding bonding the circuit layer, the electronic component, and the lead frame at one time by heating the laminate to a heating temperature of not less than 180° C. to 350° C. inclusive with adding a pressure of 1 MPa to 20 MPa inclusive in a laminating direction on the laminate, to sinter the first and second silver paste layers and form first and second silver-sintered bonding layers.

A manufacturing method of an electronic-component-mounted module includes a step of forming a laminate of: a ceramic substrate board, a circuit layer made of aluminum or aluminum alloy on the ceramic substrate board, a first silver paste layer between the circuit layer and one surface of an electronic component, the electronic component, a lead frame made of copper or copper alloy, and a second silver paste layer between the other surface of the electronic component and the lead frame; and a step of batch-bonding bonding the circuit layer, the electronic component, and the lead frame at one time by heating the laminate to a heating temperature of not less than 180° C. to 350° C. inclusive with adding a pressure of 1 MPa to 20 MPa inclusive in a laminating direction on the laminate, to sinter the first and second silver paste layers and form first and second silver-sintered bonding layers.

A manufacturing method of an electronic apparatus is provided, and the manufacturing method includes following steps. A substrate is provided. A plurality of first bonding pads are formed on the substrate. A plurality of electronic devices are provided, and each of the electronic devices includes at least one second bonding pad. The second bonding pads of the electronic devices corresponding to the first bonding pads are laminated onto the corresponding first bonding pads on the substrate, so as to bond the electronic devices to the substrate. The corresponding first and second bonding pads respectively have bonding surfaces with different surface topographies. The manufacturing method of the electronic apparatus is capable of reducing short circuit during a bonding process or improving a bonding yield.

A manufacturing method of an electronic apparatus is provided, and the manufacturing method includes following steps. A substrate is provided. A plurality of first bonding pads are formed on the substrate. A plurality of electronic devices are provided, and each of the electronic devices includes at least one second bonding pad. The second bonding pads of the electronic devices corresponding to the first bonding pads are laminated onto the corresponding first bonding pads on the substrate, so as to bond the electronic devices to the substrate. The corresponding first and second bonding pads respectively have bonding surfaces with different surface topographies. The manufacturing method of the electronic apparatus is capable of reducing short circuit during a bonding process or improving a bonding yield.