A semiconductor package includes a semiconductor chip disposed over a first main surface of a first substrate, a package lid disposed over the semiconductor chip, and spacers extending from the package lid through corresponding holes in the first substrate. The spacers enter the holes at a first main surface of the first substrate and extend beyond an opposing second main surface of the first substrate.

A semiconductor package includes a semiconductor chip disposed over a first main surface of a first substrate, a package lid disposed over the semiconductor chip, and spacers extending from the package lid through corresponding holes in the first substrate. The spacers enter the holes at a first main surface of the first substrate and extend beyond an opposing second main surface of the first substrate.

A display device may include a conductive pattern disposed on a substrate. A passivation layer may be disposed on the conductive pattern. A first shielding electrode and a second shielding electrode that may be disposed on the passivation layer may be spaced apart from each other. A first electrode may be disposed on the first shielding electrode. A second electrode may be disposed on the second shielding electrode. A light emitting element may be electrically connected between the first electrode and the second electrode. A first distance between the first shielding electrode and the second shielding electrode may be less than a second distance between the first electrode and the second electrode.

A display device includes: a power source line; a plurality of gate lines each extending in a first direction and arranged along a second direction in a plan view; a plurality of pixels connected to the power source line and the gate lines; and a plurality of vertical lines each extending in the second direction and arranged along the first direction in the plan view, wherein the vertical lines include a plurality of gate connection lines and a plurality of dummy lines between the gate connection lines, wherein the gate connection lines connect the gate lines to a gate driver, wherein the dummy lines are connected to the power source line, and wherein a distance between the dummy lines spaced apart from each other with at least one of the gate connection lines interposed therebetween is constant throughout.

A light emitting device including a substrate having a protruding pattern on an upper surface thereof, a first sub-unit disposed on the substrate, a second sub-unit disposed between the substrate and the first sub-unit, a third sub-unit disposed between the substrate and the second sub-unit, a first insulation layer at least partially in contact with side surfaces of the first, second, and third sub-units, and a second insulation layer at least partially overlapping with the first insulation layer, in which at least one of the first insulation layer and the second insulation layer includes a distributed Bragg reflector.

A transfer method includes providing a first light emitting diode on a first substrate, performing a partial laser liftoff of the first light emitting diode from the first substrate, laser bonding the first light emitting diode to the backplane after performing the partial laser liftoff, and separating the first substrate from the first light emitting diode after the laser bonding.

A transfer method includes providing a first light emitting diode on a first substrate, performing a partial laser liftoff of the first light emitting diode from the first substrate, laser bonding the first light emitting diode to the backplane after performing the partial laser liftoff, and separating the first substrate from the first light emitting diode after the laser bonding.

A method of manufacturing an electronic device includes providing a substrate, forming a solder on the substrate, and bonding a diode to the substrate through the solder, wherein the solder is formed by stacking a plurality of first conductive layers and a plurality of second conductive layers alternately, and the plurality of first conductive layers and the plurality of second conductive layers include different materials.

A method of manufacturing an electronic device includes providing a substrate, forming a solder on the substrate, and bonding a diode to the substrate through the solder, wherein the solder is formed by stacking a plurality of first conductive layers and a plurality of second conductive layers alternately, and the plurality of first conductive layers and the plurality of second conductive layers include different materials.

A method includes forming a solder layer on a surface of one or more chips. A lid is positioned over the solder layer on each of the one or more chips. Heat and pressure are applied to melt the solder layer and attach each lid to a corresponding solder layer. The solder layer has a thermal conductivity of ≥50 W/mK.