Patent classifications
H01L2924/0543
Display device incorporating self-assembled monolayer and method of manufacturing the same
A display device and a method of manufacturing the same are provided. The display device includes a first electrode disposed on a substrate, an adhesive auxiliary layer disposed on the first electrode and including a self-assembled monolayer, a light emitting element disposed on the adhesive auxiliary layer, and a contact electrode disposed between the adhesive auxiliary layer and the light emitting element. The light emitting element includes a first semiconductor layer, a second semiconductor layer disposed on the first semiconductor layer, and an intermediate layer disposed between the first semiconductor layer and the second semiconductor layer.
EXTENDED SEAL RING STRUCTURE ON WAFER-STACKING
Embodiments include a wafer-on-wafer bonding where each wafer includes a seal ring structure around die areas defined in the wafer. Embodiments provide a further seal ring spanning the interface between the wafers. Embodiments may extend the existing seal rings of the wafers, provide an extended seal ring structure separate from the existing seal rings of the wafers, or combinations thereof.
EXTENDED SEAL RING STRUCTURE ON WAFER-STACKING
Embodiments include a wafer-on-wafer bonding where each wafer includes a seal ring structure around die areas defined in the wafer. Embodiments provide a further seal ring spanning the interface between the wafers. Embodiments may extend the existing seal rings of the wafers, provide an extended seal ring structure separate from the existing seal rings of the wafers, or combinations thereof.
MICRO SEMICONDUCTOR DISPLAY DEVICE
A semiconductor structure includes a substrate, a plurality of micro semiconductor devices and a fixing structure. The micro semiconductor devices are disposed on the substrate. The fixing structure is disposed between the substrate and the micro semiconductor devices. The fixing structure includes a plurality of conductive layers and a plurality of supporting layers. The conductive layers are disposed on the lower surfaces of the micro semiconductor devices. The supporting layers are connected to the conductive layers and the substrate. The material of each of the conductive layers is different from the material of each of the supporting layers.
MICRO SEMICONDUCTOR DISPLAY DEVICE
A semiconductor structure includes a substrate, a plurality of micro semiconductor devices and a fixing structure. The micro semiconductor devices are disposed on the substrate. The fixing structure is disposed between the substrate and the micro semiconductor devices. The fixing structure includes a plurality of conductive layers and a plurality of supporting layers. The conductive layers are disposed on the lower surfaces of the micro semiconductor devices. The supporting layers are connected to the conductive layers and the substrate. The material of each of the conductive layers is different from the material of each of the supporting layers.
MANUFACTURING METHOD OF PACKAGE
A manufacturing method of a package includes at least the following steps. Contact vias are embedded in a semiconductor carrier. The contact vias are electrically grounded. A first die and a first encapsulant are provided over the semiconductor carrier. The first encapsulant encapsulates the first die. First through insulating vias (TIV) are formed aside the first die. The first TIVs are electrically grounded through the contact vias. The first die, the first encapsulant, and the first TIVs are grinded. A second die is stacked over the first die.
MANUFACTURING METHOD OF PACKAGE
A manufacturing method of a package includes at least the following steps. Contact vias are embedded in a semiconductor carrier. The contact vias are electrically grounded. A first die and a first encapsulant are provided over the semiconductor carrier. The first encapsulant encapsulates the first die. First through insulating vias (TIV) are formed aside the first die. The first TIVs are electrically grounded through the contact vias. The first die, the first encapsulant, and the first TIVs are grinded. A second die is stacked over the first die.
SEMICONDUCTOR ELEMENT AND SEMICONDUCTOR DEVICE
Provided is a semiconductor element including at least a multilayer structure including a semiconductor layer, a first metal layer, a second metal layer and a third metal layer, the semiconductor layer including an oxide semiconductor film, the first metal layer, the second metal layer and the third metal layer being arranged on the semiconductor layer, the first metal layer, the second metal layer and the third metal layer respectively including one or two or more different metals, the first metal layer being in ohmic contact with the semiconductor layer, the second metal layer being disposed between the first metal layer and the third metal layer, and the second metal layer containing Pt or/and Pd.
SEMICONDUCTOR ELEMENT AND SEMICONDUCTOR DEVICE
Provided is a semiconductor element including at least a multilayer structure including a semiconductor layer, a first metal layer, a second metal layer and a third metal layer, the semiconductor layer including an oxide semiconductor film, the first metal layer, the second metal layer and the third metal layer being arranged on the semiconductor layer, the first metal layer, the second metal layer and the third metal layer respectively including one or two or more different metals, the first metal layer being in ohmic contact with the semiconductor layer, the second metal layer being disposed between the first metal layer and the third metal layer, and the second metal layer containing Pt or/and Pd.
SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME
An interfacial structure, along with methods of forming such, are described. The structure includes a first interfacial layer having a first dielectric layer, a first conductive feature disposed in the first dielectric layer, and a first thermal conductive layer disposed on the first dielectric layer. The structure further includes a second interfacial layer disposed on the first interfacial layer. The second interfacial layer is a mirror image of the first interfacial layer with respect to an interface between the first interfacial layer and the second interfacial layer. The second interfacial layer includes a second thermal conductive layer disposed on the first thermal conductive layer, a second dielectric layer disposed on the second thermal conductive layer, and a second conductive feature disposed in the second dielectric layer.